SOI structures up to 60nm wide have been produced using oxidized porous silicon formed by selective n/n+ anodizing. The microstructures of the islands were investigated using TEM in both the planar and cross-section geometries. Typical island thickness is about 0.15nm and the buried oxidized porous silicon about 0.65μm. Retention of the island geometry is excellent. Few defects (essentially dislocations) are associated with either the anodizing or oxidation treatments. The interface sharpness between the epitaxial silicon/oxidized porous silicon is 10-20nm, an order of magnitude sharper than the back interface between the oxidized porous silicon and the substrate.

The annealing behaviour of helium bubbles formed by ambient temperature 10 keV helium implantation into silicon has been studied using transmission electron microscopy (TEM) and helium desorption spectroscopy (HDS). Although the TEM results indicated conventional bubble annealing processes due to bubble migration and coalescence, the HDS data demonstrated that helium can permeate out of bubbles in silicon around 1000K to leave behind empty cavities, thus giving a porous layer coincident with the original helium implant profile.

The addition of a low dose of implanted oxygen to the silicon-helium samples has been shown to strongly improve the stability of the porous layer, at least up to 1300K.

Gravimetric techniques offer a convenient and accurate method of determining surface layer porosity in both n- and p-type porous silicon (PS). Porosity of the PS affects its volume expansion on oxidation and the insulating properties of the resulting oxide. Optimal porosity (ca. 55%) yields fully dense, insulating oxides with minimal expansion-induced stresses. Two factors affect the porosity: chemical dissolution of PS by the anodization electrolyte, and oxidation of the PS to produce a native oxide on the surface. Buried layer porosities cannot normally be measured by gravimetric techniques unless the volume of the buried layer is large enough to yield a measurable weight change on anodization. We therefore used a form of Faraday's Law to determine buried layer porosities and determined that they can be correlated with porosities of surface layers formed under identical conditions.

High fluence ion implantation of N (1x1018/cm2 at 150 keV) has been used to form buried nitride layers in (110) silicon. After annealing at 1200 C for 5 hrs. a continuous, polycrystalline alpha-Si,N- layer (200 nm thick) is observed beneath a surface silicon film 306 nm thick. The upper Si/Si3N4 interface appears to be more abrupt than that observed in (100) silicon with minimal dendritic intergrowth and no evidence for microtwinning in the silicon. Furthermore, a band of nitride precipitates can be detected 500 nm below the continuous nitride layer. These nitride precipitates grow semi-coherently within the silicon with no observable strain or misfit dislocations within the silicon. The nitride precipitates are internally faulted to accomodate the 10% lattice mismatch in the (0001) nitride direction. Short term anneals reveal that the precipitates have fully crystallized within 10 min. at 1200 C while the continuous nitride layer is still amorphous.

(100) silicon waferSgWere-implanted with 200keV N ions to doses of 0.95 and 1.1x1018 cm-2 at a temperature of 520°C, and then annealed at 1405°C for 30 minutes. We report here observations of the resulting microstructures. A buried ɑ-Si3N4. layer and a good quality silicon overlayer were found. Evidence of cavities in the Si3N4. layer was found in the higher dose sample. Our results suggest that the cavities are associated with the delamination which sometimes occurs during annealing.

It is demonstrated that buried layers of β SiC can be fabricated within single crystal silicon substrates by implanting high doses of energetic carbon ions. If the implantation temperature is sufficiently high >625°C then the β SiC grows epitaxially within the silicon, during implantation, using the substrate as a seed. During the subsequent high temperature anneal redistribution of the implanted species occurs to give a well defined buried layer of β SiC overlain by single crystal silicon.

Buried silicon nitride layers are formed by high temperature (600-800°C), high dose (0.3-1 x 1018 Ncm -2) nitrogen implantation into silicon. The nitride structure of as-implanted and annealed (6 h at 1200°C) samples is revealed by TEM-analysis. At implantation temperatures up to 600°C an amorphous SixN" layer is formed. At higher temperatures crystalline precipitates are found within an amorphous environment. They are identified as β-Si3N4 by electron diffraction. By subsequent annealing the previously amorphous material crystallizes to a-Si3N4, while the β-grains seem to be stable.

The electrical properties of crystalline Si (c-Si) subjected to high-dose (1E17 cm-2) implantation of C with varying post- anneal conditions have been investigated. The electrical barrier formation and carrier transport across the implanted layer have been studied using metal-implanted layer-Si structures. In the as-implanted samples, a Schottky diode-like behaviour is seen but with a very high diode ideality factor. The well-known influence of ion damage on the Si surface barrier is clearly evident, but in addition we see the domination of transport by a Si-C buried layer formed after annealing . Spectroscopic ellipsometry measurements and FTIR spectroscopy confirm the formation of buried Si-C.

Bonding of 3 and 4 in. oxidized silicon wafers was investigated for SOI applications. The bonding was achieved by using a surface treatment procedure compatible with VLSI processing and by heating in an inert atmosphere a pair of wafers which had been contacted face-to-face. A quantitative method for the evaluation of the surface energy of the bond based on crack propagation was developed. The bond strength was found to increase with the bonding temperature from about 60-85 erg/cm2 at room temperature to ⋍2200 erg/cm2 at 1405°C, in good agreement with the surface energy of bulk quartz. The strength was essentially independent of the bond time for up to 1100°C. Electrical properties of the wet-oxide-to-wet-oxide bond were tested using MOS capacitors. The results were consistent with a negative interface charge density of approximately 1011cm−2 at the bond. A double etch-back procedure was used to thin the device wafer to the desired thickness within *20 nm across a 3in. wafer. The density of threading dislocations in the remaining silicon layer was smaller than 103 cm−3, and the residual dopant concentration less than 5×l015cm−3, both remnants of the etchstop layer. A discussion of the bonding mechanism will be presented.

The quality of the bond produced after mating oxidized and/or unoxidized silicon wafers has been studied using acoustic microscopy, infrared transmission thermographs, and transmission electron microscopy. The acoustic microscopy revealed that a significant number of unbonded regions (gaps) remain at the bond interface after bonding in oxygen, nitrogen, or high vacuum, and then annealing. These gaps could be virtually eliminated by a subsequent hyperbaric annealing step. The thermal imaging was found to have insufficient resolution to give a detailed picture of the bond quality. Transmission electron microscopy showed that an excellent bond could be produced when bonding clean silicon wafers, with only very small oxide or void bubbles present at the interface. Bonding two oxidized wafers resulted in a buried oxide layer with no detectable bond line. Mating an oxidized wafer to an unoxidized wafer produced a bonded silicon/oxide interface which was nearly indistiguishable from the wafer/thermal oxide interface.

The conditions for the dissolution and disintegration of SiO2 layers between silicon wafers during direct wafer bonding are discussed in terms of two possible mechanisms. The calculated maximal thickness of a SiO2 layer which may be completely dissolved does not only depend on the bonding temperature and time but also on the starting concentration of interstitial oxygen in the silicon wafers. Finally, the influence of rotational misorientation of the two wafers on the behavior of the S1O2 layers is dealt with.

The lateral solid phase epitaxial growth of amorphous Si on SiO2 patterns with 31P implantation is studied. By implanting 31P into only the surface region of the sample to form a doped channel, the Si growth rate is enhanced and the random crystallization of Si is suppressed. The maximum length of lateral solid phase epitaxial Si obtained from samples with the doped channel (∼9μπι) is a factor of 3 more than that of the undoped sample. This Si on SiO2 film has a low dopant concentration after the highly doped channel is removed and should be useful for device application.

We report the first results of direct growth of GaAs by molecular beam epitaxy on nominally (100) oriented silicon with buried implanted oxides. Rutherford backscattering and transmission electron microscopy techniques have been used to characterize these layers. The formation of hillocks and a uniform layer of GaAs in the intervening regions between hillocks have been observed. Microtwins, dislocations and antiphase domain boundaries are the predominant defects observed in these layers.