Recrystallized silicon films on amorphous substrates are mainly characterized by subgrain boundaries separated by a few microns. Using seedina from the silicon substrate (lateral epitaxy), subboundary free areas adjacent to the seed are achieved in the direction of the beam scanninq. We have demonstrated the large influence of the growth direction and of the thickness of the silicon layer together on the incubation distance and on the spacing of the subboundaries. Surprisingly, a variation of the arowth (scan) velocity of two orders of magnitude (from 1 to 70 cm/s) has no noticeable influence on these narameters. A I × 10 elliptical Ar+ laser beam has been used in these experiments. An interpretation of these results in terms of lateral (step) growth and stress will be given.

Seeding from bulk silicon (lateral epitaxy) has been used in Ar+ laser recrystallization to achieve subboundary free silicon on insulator areas. On these areas C.MOS devices have been performed using almost entirely the standard processing steps of a bulk micronic C-MOS technology. n -MOS transistors with channel length as small as 0.3 um have shown very small leakage currents. This is attributed especially to the lack of subboundaries. A 40 % increase in the dynamic performances in comparison with equivalent size C-MOS bulk devices has been obtained (93 ps of delay time per stage for a 101 stages ring oscillator with 0.8 μm of channel length). This is the best result presented so far on recrystallized SOI. No special requirements are needed in the lay out of the circuit with the chosen seed structure. Furthermore an industrial processing rate for the laser recrystallization processing has been achieved using an elliptical laser beam, a high scan velocity (30 cm/s) and a 100 μm line to line scan step (a 4' wafer in 4 minutes).

By improving the thermal uniformity and stability of our graphite-strip-heater oven, we have been able to significantly improve the overall quality of ZMR Si films. We have observed unbranched subboundaries and new types of defects that are less extended than the usual sub-boundaries. The overall wafer flatness has been improved so that total warp is less than 4 μm for 3-inch wafers. We have also utilized the ZMR technique for producing thin Ge-on-insulator films.

A line-source electron beam has been used to melt and recrystallize isolated Si layers to form Si-on-Insulator structures, and the processis simulated by heat flow calculations. Using sample sweep speeds of 100-600 cm/s and peak power densities up to 75 kW/cm2 in the 1 × 20 mm beam, we have obtained single-crystal areas as large as 50 × 350 μIm. Seed openings to the substrate are used to control the orientation of the regrowth and the heat flow in the recrystallizing film. A finite-element heat flow code has been developed which correctly simulates the experimental results and which allows the calculation of untried sample configurations.

Radiative melting of Si with an extended stationary heater and its crystallization are modeled numerically. The two-dimensional model provides the velocity and shape of the solid-liquid interface, above and below a buried oxide structure with slit-shaped openings. The results show qualitative agreement with the experimental data. Superheating and undercooling are included in the calculation and the amount of superheating is confirmed experimentally.

A two dimensional solution of the classical heat equation is obtained and used to predict thermal profiles during line source zone melting recrystallization of silicon on insulators. A macroscopic solidification model is used to find the extent of the molten zone in multilayered structures. The problems of convergence associated with moving phase boundaries are reduced by using transformed temperature and the enthalpy model The resultant isotherms, obtained at varying zone scan speeds, indicate optimum experimental conditions.

During radiative melting, a silicon surface breaks up into coexisting solid and liquid regions with spacing dependent on incident flux, thermal parameters, and crystalline properties of the sample. The space-averaged reflectivity becomes a function of the incident photon flux, profoundly affecting the transfer of energy and the rate of melting.

We explain time evolution of the molten surface morphology and present data relating depth of melting to the incident photon flux for bulk Si and Si with buried oxide. The data prove the existence of a steady state transition region in which meltingis only superficial and time-independent.

Silicon-on-insulator (SOI) technologies have four major applications: very-large-scale integrated circuits (ICs), high-voltage ICs, large-area ICs, and vertical ICs. This paper will review the recent progress made in these areas and discuss the prospects of various SOI technologies for achieving commercialization.

There are various methods for producing device-worthy Silicon-on-Insulator films, most, however, are unsuitable for fabrication of 3D integrated structures. The laser recrystallization technique is currently the only one which has produced single-crystal devices for 3D ICs. Improvements on this technique have been such that defects such as grain boundaries can be localized and even eliminated. High speed CMOS circuits with VLSI features have been realized as well as new devices which take advantage of the 3D arrangement of vertically integrated structures. Although 3D integration is still in the early stages of development, it has already opened up new perspectives for applications such as high speed circuits, dense memories, and sensors.

A new laser recrystallizing technique has been developedfor high density SOI-LSI's. This technique produces single crystalline silicon islands on an amorphous insulating layerwithout seed. Square windows are opened at arbitrary places in an antireflection cap over a polycrystalline film on an amorphous insulatinq layer. Grain boundaries of the polycrystalline Si in the window are removed completely at the subsequent laser-recrystallization step. Single crystalline silicon islands are formed by self-aligned etching of silicon film which was covered by the antireflection cap. This technique is an effective method for fabricating high density SOI-LSI's, since the singlecrystalline islands can be fabricated at arbitrarily selected places. Yield of the grain-boundary-free islands was 95% the size of the island is 1O x 20μm, and the irradiation oyerlap of laser-beam traces is 70%.

We demonstrate a new two step laser recrystallization for crystallographic orientation control. In the cw Ar ion laser recrystallization of silicon stripes in the structure consisting of SiO2 grooves/polycrystalline Si sublayer/backing substrates, first, one edge of poly-Si stripes is intentionally recrystallized under relatively low laser power and a long dwell time in order to form a strong <100> texture with lamellar grains, second, poly-Si stripes are fully recrystallized using the above <100> texture as seed crystals by scanning a laser beam along the stripes. We discuss a strong <100> texture formation related to partially molten state in the first process of secondary seed formation, and use of a grooved structure with poly-Si sublayer suppressing edge nucleation during lateral epitaxy.

Integrated detection of light propagating in an optical waveguide by a photodetector array fabricated directly on the waveguide surface is demonstrated. Laser recrystallization of LPCVD polysilicon patterned with periodically-spaced anti-reflection stripes is utilized. Lateral p-i-n photodiode elements formed by ion implantation are characterized by reverse leakage currents of < 10−11 amp and a typical breakdown voltage of 50 volts. Optical response is found to be linear over a dynamic range of greater than 55 dB.

We have used x-ray diffraction to measure the strain perpendicular to the substrate surface in laser crystallized silicon films on oxidized silicon and fused quartz substrates. The dependence of the strain on grainorientation was determined and the influence of the scan speed, the insulating oxide thickness, and subsequent high temperature exposure was examined. Maximum strain was obtained for grains oriented with the (100) plane parallel to the substrate surface. The strain decreased with increasing angle between the surface plane and the (100) plane of the grains. The stress parallel to the surface in the variously oriented grains was calculated from the stiffness tensor, assuming an isotropic, in-plane stress, and a variation similar to the strain was found. The strain found on oxidized wafers was about half that on fused quartz. Its dependence upon the oxide thickness (0.2 μm to 1.0 μm) was not significant for scan speeds under 10 cm/sec. Similarly, the variation in strain with scan speed was very small for speeds below 10 cm/sec. Scan speeds above 50 cm/sec caused significant increases in the strain.

The measured strain was reduced by high temperature anneals. A 1100°C anneal reduced the average strain by 60% and caused a clear reduction in grain imperfections (as determined by diffracted beam width). However, a 900'C anneal increased the diffracted beam widths even though the average strain was reduced by about 30%.

Laser processing of thin films of amorphous or polycrystalline silicon on insulator substrates, such as the glass normally used for liquid crystal displays, frequently leads to film thickness variations which are unacceptable for device fabrication. Some thickness variations are caused by the high surface tension of molten silicon and the poor adhesion of the silicon to the substrate. Techniques to reduce this problem by increasing the adhesion of the film to silicon dioxide coated Corning 7059 glass substrates have been investigated. Two different approaches were used. First, silicon ions were implanted into the silicon-glass interface to increase the direct bonding of the silicon to the silicon dioxide. Second, layers of material known to exhibit better adhesion to both silicon and silicon dioxide were introduced between the silicon film and the glass substrate. Both techniques produced films which, after subsequent laser processing, showed significantly reduced thickness variations. These procedures make it possible to laser process thin films of silicon on Corning 7059 glass substrates under conditions which produce large grain polysilicon films without producing unacceptably large thickness variations or film cracking.

Lateral solid phase epitaxy (L-SPE) of ultra-high-vacuum (UHV) deposited amorphous Si (a-Si) over patterned SiO2 has been studied to produce monocrystalline silicon-on-insulator (SOI) films. When employing UHV-deposited a-Si, it is essential for L-SPE to reduce step height at the pattern boundary. This is because low density a-Si including columnar voids is formed at the step wall by the self-shadowing effect and SPE region does not extend across the low density a-Si area. L-SPE growth distance of 7 μm was achieved by low temperature annealing (575°C, 20 hr) on a planar substrate with recessed SiO2 patterns. Another deposition technique of a-Si for SPE, i.e., chemical vapor deposition is reviewed for comparison.

Two possible solutions to the problem of nucleus growth encountered in lateral solid-phase epitaxial growth over insulating films are discussed. A stress field originating from the thermal expansion coefficient for Si and SiO2 acts as the driving force behind preferential nucleation. Utilization of underlying Si3N4 films successfully eliminated nucleii growth at topographically irregular portions. In addition, single crystallization of poly-Si nucleii was achieved on SOI structures for the first time. Lateral growth speed (v [cm/s]) of 1.6 × 10 exp(−3.9/kT[eV]) was obtained during high-temperature annealing (≥1000 C ).

A wide variety of techniques for producing device-quality semiconductor films on insulating substrates (SOI) are being studied. Processes which provide low defect density films at low temperatures and which do not require seeding from a single crystal substrate would offer the greatest flexibility. While such processes do not currently exist, approaches based on crystallization of amorphous silicon or grain growth in polycrystalline silicon are being investigated. Development of either approach requires careful control of film properties and improved understanding of the fundamental materials processes involved. Theory and experiments on surface-energy-driven secondary grain growth (SEDS6G) are briefly reviewed. Controlled SEDS66 may provide a low temperature means of obtaining low defect density films of a variety of materials on a common substrate.

Polycrystalline silicon films of 300 nm thickness were deposited on oxidized wafer surfaces, implanted with As, and annealed on a Varian IA 200 rapid thermal annealer. Transmission electron microscopy was used to study through-thickness and cross sectional views of grain size and morphology of as-deposited and of transient annealed films. A bimoda] distribution of grain sizes was present in as-deposited polycrystalline silicon films. The first population was due to columnar growth of some grains to a final average diameter of 20 rm. The second population of small equiaxed grains of 5 nm average diameter were formed early in the deposition process. During transient annealing grains in the first population grew rapidly up to 280-nm equiaxed grains. After this the growth rate decreased due to the grain size reaching the thickness of the film. Grains in the second population grew rapidly up to a size of 150 nm, after which the growth rate was lowered due to grains impinging upon one another. The grain growth processes for both populations have been described with a modified model for interfacially driven grain growth. This model accounts for diffusion and grain growth which occur with rapidly rising and falling temperatures during short annealing times characteristic of transient annealing processes.

Polycrystalline silicon films 4800 Å thick deposited via low pressure chemical vapor deposition on oxidized silicon wafers have been amorphized by silicon ion implantation and subsequently recrystallized at 700°C. Due to channeling of the ions through grains whose <110> axes were sufficiently parallel to the beam, these grains survived the implantation step and acted as seed crystals for the solid-phase epitaxial regrowth of the film. This work suggests the feasibility of combining ion implantation and furnace annealing to generate large-grain, uniformly oriented polycrystal1ine films on amorphous substrates. It is a potential low-temperature silicon-on-insulator technology.