This paper reports a differential photoreceiver module designed for short reach applications such as access network and data center interconnect. It consists of a monolithically integrated semi-conductor optical amplifier with a PIN photodiode and a linear transimpedance amplifier (TIA) mounted on the same carrier. A matching circuit is placed between the PIN and the TIA in order to increase the cut-off frequency. The module shows a −3 dB bandwidth of 43 GHz, a single-ended conversion gain of 10 000 V/W for an optical input power of −25 dBm and a sensitivity at 40 Gb/s non-return-to-zero operation of −22.5 dBm for a bit error rate of 10−9.

This paper presents a full-duplex dual-band orthogonal frequency division duplexing (OFDM) radio architecture that enables the radio transceiver to be more flexible and provides a viable radio link capacity gain. A simple but practical I/Q imbalance estimation and compensation method, based on the frequency-flat-fading behavior of the self-interference channel, is proposed. The performance of the proposed I/Q imbalance compensation method is evaluated by link level simulation conducted with Advanced Design System and Matlab. The co-simulation results show that the proposed radio transceiver could potentially increase the physical layer transmission rate by four times compared with the conventional radio link at the cost of tolerable loss of bit error rate performance. The I/Q imbalance compensation method can effectively compensate both high and low I/Q imbalance without the problem of algorithm convergence.

This paper presents two J-band amplifiers in different 0.13 μm SiGe technologies: a small signal amplifier (SSA) in a technology in which never before gain has been shown over 200 GHz; and a low noise amplifier (LNA) design for 230 GHz applications in an advanced SiGe HBT technology with higher fT/fmax, demonstrating the combination of high gain, low noise, and low power in a single amplifier. Both circuits consist of a four-stage pseudo-differential cascode topology. By employing series–series feedback at the single-stage level the small-signal gain is increased, enabling circuit operation at high-frequencies and with improved efficiency, while maintaining unconditional stability. The SSA was fabricated in a SiGe BiCMOS technology by Infineon with fT/fmax values of 250/360 GHz. It has measured 19.5 dB gain at 212 GHz with a 3 dB bandwidth of 21 GHz. It draws 65 mA from a 3.3 V supply. On the other hand, a LNA was designed in a SiGe BiCMOS technology by IHP with fT/fmax of 300/450 GHz. The LNA has measured 22.5 dB gain at 233 GHz with a 3 dB bandwidth of 10 GHz and a simulated noise figure of 12.5 dB. The LNA draws only 17 mA from a 4 V supply. The design methodology, which led to these record results, is described in detail with the LNA as an example.

A MMIC double-balanced subharmonic diode ring mixer was designed for broadband satellite communications exploiting a GaAs pHEMT process. The circuit implements the frequency conversion from Q (43.5–50 GHz) to Ku-K band (17–21.5 GHz). Besides the RF, LO, and IF baluns, the MMIC integrates a buffer amplifier for the local oscillator signal, which is designed between X and Ku bands (11–16.5 GHz), due to the subharmonic operation. The mixer measured conversion loss is between 8 and 12 dB along the bandwidth, with an LO power of 9 dBm. The input p1 dB and IP3 are 2 and 15 dBm, respectively. The balanced structure ensures an LO and 2 × LO leakages at the IF port lower than −25 and −35 dBm, respectively. Other spurious remain below −67 dBc. The chip dimensions are 2.4 × 2.4 mm2.

This work presents a wideband amplifier, in 12–19 GHz frequency range, with noise figure lower than 1.35 and 26 dB of gain developed in the frame of European Component Initiative program, supported by European Space Agency. By using a flexible biasing, this amplifier allows us to reach a significant linearity, output power at 1 dB compression up to 19 dBm, or to reduce the DC consumption close to 210 mW. This versatility implies that a user has a low-noise amplifier) or medium power amplifier in a single chip. The D01PHS process, from OMMIC foundry, has been chosen in order to realize this MMIC, thanks to linearity capability, and also thanks to a significant potential for low-noise amplification.

Two types of optoelectronic oscillators delivering high spectral purity microwave signals are presented in this paper. These oscillators use the Pound–Drever–Hall laser stabilization technique to lock the laser carrier onto two different types of passive optical resonators featuring high-quality factors: a fiber ring resonator (FRR) and a whispering gallery mode monocrystalline disk-shaped micro-resonator. The different noise processes occurring inside these oscillators are discussed. Particular attention is given to the conversion of the laser's amplitude and frequency noise into RF phase noise via the laser stabilization loop and the resonator, and via the photodetector nonlinearity as well. A modeling approach using CAD software is also proposed to qualitatively evaluate laser noise conversion through the optical resonator. Moreover, different contributions of nonlinear optical scattering noise are discussed, mainly in the case of the FRR-based oscillator. When controlling these nonlinear optical effects in the case of the FRR, low-phase noise operation of the oscillator has been achieved, with a −40 dBc/Hz noise level at 10 Hz offset frequency from a 10.2 GHz RF carrier.

A compact, microstrip, two-stage, room temperature, single-ended low noise amplifier (LNA) is designed using commercial components for Aperture Tile in Focus (APERTIF), a square kilometre array (SKA) pathfinder project. Various techniques are investigated to insert inductance between the source pad of the package and the ground plane of the printed circuit board (PCB), with the chosen design able to do this using standard manufacturing techniques. The desired noise temperature of 25 K (noise figure (NF) of 0.36 dB) is met over the 1.0–1.8 GHz band, with an input return loss better than 10 dB.

This paper presents the design of an eight-element 60 GHz phased-array receiver chip with interference mitigation capability, fabricated in 0.25 μm SiGe BiCMOS technology. Each receiver element contains a low noise amplifier (LNA) and a vector-modulator that supports high-resolution amplitude and phase control. A fully differential power combining network follows the eight elements. The chip also includes an active power divider, a down conversion mixer, and fully integrated 48 GHz PLL to demonstrate the IF down-conversion. With LNA, a phase shifter and hybrid active and passive power combining network, each receiver path achieves 18 dB of gain, 360° phase shift in steps less than 3°, 20 dB amplitude control, and 4 GHz 3 dB-bandwidth and input referred 1 dB compression point P1 dB of each element is of −22 dBm. Each receiver element dissipates in total 132 mW. The phased-array receiver shows more than 25 dB of signal to interference noise ratio, by means of amplitude and phase control.

We report on the development of W-band (75–110 GHz) heterodyne receiver technology for large-format astronomical arrays. The receiver system is designed to be both mass producible, so that the designs could be scaled to thousands of receiver elements, and modular. Most of the receiver functionality is integrated into compact monolithic microwave integrated circuit (MMIC) amplifier-based multichip modules. The MMIC modules include a chain of InP MMIC low-noise amplifiers, coupled-line bandpass filters, and sub-harmonic Schottky diode mixers. The receiver signals will be routed to and from the MMIC modules on a multilayer high-frequency laminate, which includes splitters, amplifiers, and frequency triplers. A prototype MMIC module has exhibited a band-averaged noise temperature of 41 K from 82 to 100 GHz and a gain of 29 dB at 15 K, which is the state-of-the-art for heterodyne multichip modules.