We present experimental results showing that Cr/p+/V amorphous silicon memory structures at room temperature exhibit step-like current-voltage characteristics associated with discrete, non-random resistance values. The resistance values observed are ∼26kΩ/i where i is an integer or half integer. The low bias current-voltage characteristics prior to the first step suggest that conduction in this regime is governed by tunneling across a region having very small dimensions, of the order of ∼5-7 Å, and having a diameter ∼30-50 Å.