In this chapter we want to refine the analysis of the ground state and low-lying excitations of the Hubbard model in the phases with gapless modes, i.e. phases II, IV and V discussed in Chapters 6, 7, by taking account of corrections which are important when considering Hubbard chains of finite length L. For the generic case, i.e. away from half-filling in a magnetic field, the finite-size corrections to the spectrum of the Hubbard model have been calculated by F. Woynarovich [487]. These results are the basis for our discussion in the following Chapter 9 of the asymptotic behaviour of correlation functions within the conformal approach [6, 51, 62, 75] and thereby will allow us to make contact with Haldane's Luttinger liquid approach for the description of one-dimensional strongly correlated electron systems [189–192]

Generic case – the repulsive Hubbard model in a magnetic field

To investigate how the thermodynamic limit is approached we have to take into account finite-size corrections in our previous derivation of integral equations from Takahashi's equations. This analysis has to be performed separately for each of the phases with gapless excitations identified before. From a technical point of view the most complex situation is found in phase IV – the partially filled, partially magnetized band with two massless modes. The finite-size scaling behaviour in the phases with a single gapless mode can be studied using the same techniques and we will point out the differences to the ‘generic’ case studied in this section later in this chapter.

At half-filling the repulsive Hubbard model is in a Mott insulating phase. The charge degrees of freedom are gapped, whereas the spin degrees of freedom remain gapless. At low energies the spin sector is actually scale invariant (apart from logarithmic corrections) and Conformal Field Theory (CFT) methods may be applied to determine the low-energy behaviour of correlation functions involving only the spin sector. On the other hand, the charge sector is not scale invariant and CFT does not provide any information for correlators involving the charge degrees of freedom. In this chapter we will show that there exists a particular continuum limit of the half filled Hubbard model, in which it is possible to calculate dynamical correlation functions by means of methods of integrable quantum field theory. We first construct a Lorentz invariant scaling limit starting from the results for the excitation spectrum and the S-matrix discussed in Chapter 7. This scaling limit is identified as the SU(2) Thirring model, which is an integrable relativistic quantum field theory. Next we discuss a continuum limit, which is obtained directly from the Hubbard Hamiltonian and describes the vicinity of the scaling limit.

Construction of the scaling limit

The simplest way of constructing the scaling limit is to start with the results for the dispersions of the elementary excitations and the S-matrix derived in Chapter 7 and then look for a particular limit in which Lorentz invariance is recovered.

In Chapter 9 we developed the picture of the asymptotics of the correlation functions of the Hubbard model for the phases with gapless excitations, i.e., for the phases with ground states belonging to regions II and IV of the ground state phase diagram discussed in Chapter 6.3 (see figures 6.4, 6.5). Our results relied on the predictions of conformal field theory which are expected to hold for a whole universality class of models related to the Hubbard model and which only need the finite size data calculated in Chapter 8 as input parameters. Correlation functions at half-filling (phase V) were considered in the previous chapter on the basis of a special continuum limit and the predictions of certain integrable quantum field theories.

Here we shall consider correlation functions in the phase whose ground state is the empty band (phase I in the ground state phase diagram, figures 6.4, 6.5). At zero temperature the boundary of this phase in the μ-B plane (see figure 6.5) is determined by equation (6.20): μ < μ0(B). For small finite temperature a small number of particles is populating the system. They form a dilute, thermodynamically ideal gas with pressure proportional to the temperature (see below). We shall say the system is in the gas phase [176] and shall give a more precise meaning to this statement later.

In this chapter we discuss metal–insulator-semiconductor, MIS, structures. The most important MIS structure is the metal-oxide-semiconductor, or MOS, structure. The MOS structure is used to provide gating action in MOSFETs. Here we will discuss both ideal and realistic systems and examine their behavior both in equilibrium and under bias. The chapter concludes with a discussion of the workings of MOSFETs.

MIS systems in equilibrium

The basic device structure of interest is sketched in Fig. 6.1. Inspection of Fig. 6.1 shows that the MIS structure consists of three different layers: metal, insulator, and semiconductor layers. In this section we examine the operation of MIS systems in equilibrium. We start with a discussion of ideal MIS systems that have the following properties:

1. (i) The metal–semiconductor work function difference, ϕms, is zero at zero applied bias.

2. (ii) The insulator is perfect; it has zero conductivity, σ = 0.

3. (iii) No interface states located at the semiconductor–oxide interface are assumed to exist.

4. (iv) The semiconductor is uniformly doped.

5. (v) There is a field free region between the semiconductor and the back contact. In other words, there is no voltage drop within the bulk semiconductor.

6. (vi) The structure is essentially one-dimensional.

7. (vii) The metal gate can be treated as an equipotential surface.

To draw the band diagram of the MIS structure in equilibrium we first recognize that the Fermi level must be flat everywhere in the structure as shown in Fig. 6.2.

In this chapter we examine the basics of optical and mobile telecommunications systems that impact semiconductor devices. Our aim is to determine the principal characteristics of lightwave and mobile telecommunications systems that influence device selection. Lightwave communications systems are based on optical fibers and several device components are needed to support lightwave transmission, encoding, amplification, detection, and decoding. The device components used within lightwave systems fall into two general categories: optoelectronic and optical. In mobile telecommunications systems the device types of greatest importance are high frequency, high power transistors. Here we will briefly outline how some of the system requirements influence device choice and dictate their performance.

Fiber transmission

There are several important advantages to fiber optic communication systems. These can be summarized as:

1. (1) Smaller diameter, lighter weight, and increased flexibility.

2. (2) Relatively low cost compared to copper cables. Fiber optic cables are relatively inexpensive due to the low cost of the materials employed.

3. (3) Good isolation and cross-talk immunity.

4. (4) Low transmission loss and dispersion.

5. (5) High security in transmission. There is little signal “spilling” from the fiber if properly shielded in contrast to that for copper systems.

6. (6) Tremendous capacity. As we will see below, the capacity of existing fiber optic lines as measured by bandwidth is measured in terahertz.

For the above reasons, most of the long distance communication within the USA and many parts of the world is conducted using fiber optics.

In this chapter we consider both evolutionary and revolutionary advances that go beyond current CMOS technology. By evolutionary we mean advances that retain the standard CMOS paradigm, i.e., the devices are still FETs, consist of similar materials to that used for CMOS, and can be fabricated using current techniques. Revolutionary advances, on the other hand, break out of the standard CMOS paradigm. In these approaches novel substances are used, radically different devices take the place of CMOS FETs, and even the nature of computation is different. The revolutionary approaches to replacing CMOS may or may not prove successful. It is the purpose of this chapter to introduce the student to potential replacements to CMOS keeping in mind that all, some, or none of these approaches may supplant CMOS for computing applications. Finally, the list of revolutionary approaches that we will address is not exhaustive. Specifically, most of the quantum effect methods will not be discussed here, in particular, single electron transistors, spin based devices (spintronics), resonant tunneling devices, and quantum computing. The interested reader is referred to the book by Brennan and Brown (2002) for a discussion of these topics. We will restrict ourselves to discussion of devices that do not require knowledge of quantum mechanics.

Evolutionary advances beyond CMOS

In this section we examine three different evolutionary approaches that go beyond standard CMOS devices. These are Si on insulator, SOI, dual gate FETs, and silicon–germanium, SiGe, structures. Let us first examine SOI.

In this chapter, we review the basic fundamentals of semiconductors that will be used throughout the text. Only the fundamental issues that we will need to begin our study of semiconductor devices utilized in computing and telecommunications systems are discussed.

Before we begin our study it is useful to point out how semiconductor devices are instrumental in many applications. In this book we will mainly examine the application of semiconductor devices to computing and telecommunications systems. Specifically, we will examine the primary device used in integrated circuits for digital systems, the metal oxide semiconductor field effect transistor, MOSFET. The discussion will focus on state-of-the-art MOSFET devices and future approaches that extend conventional MOSFETs and revolutionary approaches that go well beyond MOSFETs. It is expected that computing hardware will continue to improve, providing faster and more powerful computers in the future using either some or all of the techniques discussed here or perhaps using completely new technologies. In any event, there is almost certainly going to be a large growth in computing hardware in order to maintain the pace of computer development and this book will help introduce the student to emerging technologies that may play a role in future computing platforms.

The second major topic of this book involves discussion of semiconductor devices for telecommunications applications. We will examine devices of use in lightwave communications as well as wireless communications networks. Among these devices are emitters, detectors, amplifiers, and repeaters.

In this chapter we discuss the two field effect transistors (FETs) that utilize either p–n junctions or Schottky barriers to provide gating action. These devices are junction field effect transistors, JFETs, and metal semiconductor field effect transistors, MESFETs. Both types of device are based on the field effect, except that they use different mechanisms to provide gating action. In the field effect, the conductivity of the underlying semiconductor can be altered by the presence of an electric field, in this case, produced by the application of a gate bias voltage. The gate typically lies on the top of the device and thus the conductivity can be controlled from the top of the device, making the contacting of the device relatively straightforward. For this reason high levels of integration have been achieved using field effect devices. The most important of these devices is the metal oxide semiconductor field effect transistor, MOSFET, which will be discussed in detail in Chapter 6.

JFET operation

A JFET uses two p–n junctions on the top and bottom of the device as gates as shown in Fig. 5.1. The top and bottom gates are biased in the same manner. Notice that the gate p–n junctions are p+–n junctions. Thus most of the depletion region width forms within the more lightly doped n-region rather than the p+-region. The depletion regions from the top and bottom gates encroach on the conducting channel formed in the n-type material between the two gates.

At the time of this writing the microelectronics industry is poised at the threshold of a major turning point. For nearly fifty years, the industry has grown from the initial invention of the integrated circuit through the continued refinement and miniaturization of silicon based transistors. Along with the development of complementary metal oxide semiconductor circuitry, miniaturization of semiconductor devices created what has been called the information revolution. Each new generation of devices leads to improved performance of memory and microprocessor chips at ever reduced cost, thus fueling the expansion and development of computing technology. The growth rate in integrated circuit technology, a doubling in chip complexity every eighteen months or so, is known as Moore's First Law. Interestingly, the semiconductor industry has been able to keep pace with Moore's First Law and at times exceed it over the past forty years. However, now at the beginning of the twenty-first century doubts are being raised as to just how much longer the industry can follow Moore's First Law. There are many difficult challenges that confront CMOS technology as device dimensions scale down below 0.1 μm. Many people have predicted that several of these challenges will be so difficult and expensive to overcome that continued growth in CMOS development will be threatened. Further improvement in device technology will then require a disruptive, revolutionary technology.

One might first wonder why is it important to continue to improve microprocessor speed and memory storage much beyond current levels? Part of the answer to this question comes from the simultaneous development of the telecommunications industry.

In this chapter we discuss different types of junctions that are of importance in semiconductor devices. Specifically, we examine p–n junctions, Schottky barriers, and ohmic contacts. We will delay discussing metal–insulator–semiconductor, MIS, junctions until Chapter 6. We begin our discussion with p–n homojunctions. Heterojunctions, junctions formed between two dissimilar materials, are discussed briefly in Chapter 11. Devices made using heterojunctions are also presented in Chapter 11.

p–n homojunction in equilibrium

Before we begin our study of junctions let us make a few definitions. The bulk region is the area far from the junction where the carrier concentrations are equal to their equilibrium values. The metallurgical junction is the physical location of the junction between the n- and p-type regions. The depletion region is the area surrounding the metallurgical junction. It is called the depletion region since the action of the built-in field within the junction sweeps out the free carriers leaving behind immobile space charge.

For simplicity we make the following assumptions:

1. (i) The junction is one-dimensional, and a one-dimensional analysis can be employed.

2. (ii) The metallurgical junction is located at x = 0.

3. (iii) The p–n homojunction is a step or abrupt junction with uniformly doped p and n regions.

4. (iv) There exist perfect ohmic contacts far away from the metallurgical junction.

Let us first consider the p–n junction in equilibrium. As is always the case, in equilibrium no net current flows. For simplicity let us assume that our p–n junction is formed by putting an n-type layer into contact with a p-type layer.

Though long channel MOSFET devices are an excellent means of describing how MOSFETs work, they are rarely used nowadays. In order to increase the number of active devices on a chip and thus improve its functionality, MOSFET device structures have undergone continued miniaturization. The long channel theory developed in Chapter 6 is valid only for devices that have channel lengths greater than about 1-2 μm. Present state-of-the-art MOSFETs used in digital integrated circuits are very much smaller than this. At the time of this writing, major integrated circuit manufacturers are producing commercial products with 0.13 μm gate lengths. Devices with only 0.1 μm gate lengths are already in the design stage. Therefore, state-of-the-art devices are very different from the long channel MOSFETs discussed in Chapter 6. In this chapter we examine the processes in state-of-the-art Si based MOSFETs and discuss how reduction in the gate length influences device behavior.

Short-channel effects

There are many complications that arise as MOSFET devices are miniaturized. These can be summarized as arising from material and processing problems or from intrinsic device performance issues. As the device dimensions shrink it is ever more difficult to perform the basic device fabrication steps. For example, as the device dimensions become smaller and the circuit denser and more complex, problems are encountered in lithography, interconnects, and processing. Different intrinsic device properties are affected by device miniaturization. The class of effects that alter device behavior that arise from device miniaturization are generally referred to as short-channel effects.