This paper presents a fully integrated three-way Doherty architecture to address the challenges of 5G applications using laterally-diffused metal-oxide semiconductor (LDMOS) technology. By using the so-called CDS cancelation method for the Doherty combiner design, a wideband impedance transformation is achieved, that combined with the three-way Doherty power amplifier (DPA) architecture allows for high efficiency in deep back-off, with a reduced load modulation for high bandwidth. Throughout this paper, the design approach and realization are described, while multiple critical design challenges will be addressed such as low frequency drain resonance optimization, impact of in-package coupling effects, and linearity versus efficiency tradeoff. Two state-of-the-art three-way fully integrated LDMOS DPA monolithic microwave integrated circuit (MMICs) are presented to demonstrate how these measures have been successfully applied to different power amplifier (PA) line-up components for 5G base station systems. First, a 60 W 1.8–2.2 GHz multi-stage device for driver application in true dual-band operation is presented. The circuit design pays special attention to extended PA video bandwidth thanks to integrated passive device. After digital pre-distortion (DPD) in dual-band operation, this highly linear device achieves an outstanding adjacent channel leakage ratio (ACLR) of −56 dBc for a 2cLTE 20 MHz 8 dB peak-to-average ratio signal spaced by 345 MHz, thus 385 MHz instantaneous bandwidth (IBW), with 29% efficiency at 35 dBm, 12 dB output back-off (OBO). Second, the simulation and measurement results of a 55 W 2.6 GHz multi-stage DPA for massive-MIMO final stage application are presented, which yields an excellent linearized efficiency of 49% using a 200 MHz 10cLTE signal with an ACLR lower than −47.5 dBc. For 8cLTE 20 MHz (160 MHz IBW), the device yields 50% efficiency with −50.7 dBc ACLR linearized after DPD. The achieved efficiency is well comparable to published GaN DPAs. These results were achieved by improved simulation techniques to minimize frequency dispersion and thus allow high efficiency operation over wide bandwidth. Both devices show that LDMOS is not only a mature technology which allows those PAs to be reliable and low-cost for mass production in very compact packages, but also provide best-in-class RF performance according to the needs of 5G base station systems.

Modern telecommunications are moving towards (massive) multi-input multi-output (MIMO) systems in 5th generation (5G) technology, increasing the dimensionality of the systems dramatically. In this paper, the impairments of radio frequency (RF) power amplifiers (PAs) in a 3 × 3 MIMO system are compensated in both the time and the frequency domains. A three-dimensional (3D) time-domain memory polynomial-type model is proposed as an extension of conventional 2D models. Furthermore, a 3D frequency-domain technique is formulated based on the proposed time-domain model to reduce the dimensionality of the model, while preserving the performance in terms of model errors. In the 3D frequency-domain technique, the bandwidth of the system is split into several narrow sub-bands, and the parameters of the model are estimated for each sub-band. This approach requires less computational complexity, and also the procedure of the parameters estimation for each sub-band can be implemented independently. The device-under-test consists of three RF PAs including input and output cross-talk channels. The proposed techniques are evaluated in both behavioral modeling and digital pre-distortion (DPD) perspectives. The experimental results show that the proposed DPD technique can compensate the errors of non-linearity and memory effects in the both time and frequency domains.

In building highly efficient transmitters of today, one is forced to sacrifice linearity for efficiency. Some of the highest power amplifier efficiency figures are reported by envelope tracking (ET) amplifiers. These amplifiers can generate strong higher-order harmonics, which can lead to interference with receivers operating at the harmonic frequencies. Using non-linear interference cancellation, we can help to remove the interference being caused in those receivers. This paper looks at the problem of modeling the third and second-order harmonic emission from an ET amplifier. It derives the non-linear kernel for estimating such interference. This kernel has been rigorously expanded to show its correlation with the various harmonics and its effectiveness in predicting the harmonic content. We then set up an envelope amplifier test-bench to capture harmonic signal content and cancel it using the derived kernel model. The experiment yields excellent agreement with theory and provides a validation of the system and concept.

We propose in this paper a 4-channel time-domain test bench for the characterization and linearity enhancement of microwave power amplifiers (PAs). The proposed time-domain measurement system utilizes four track and hold amplifiers (THAs) for direct subsampling of radiofrequency (RF) signals. The use of wideband THAs to replace samplers or mixers enables reducing analog IF circuit complexity. It permits direct digitization of RF signals like CW, two-tone and pulsed modulated signals, bringing more flexibility in the receiver's performance by enhancing the dynamic range and bandwidth. This test bench is capable of completely extracting the phase, amplitude, and transfer characteristics of non-linear devices excited with CW or modulated RF signals. In this work, two-tone transfer characteristics of a 50 W GaN HEMT Nitronex PA were extracted and processed for applying digital pre-distortion linearization to enhance linearity performance. Time-domain envelope and carrier waveforms (voltage and current) along with third-order inter-modulation distortion (IMD) products with and without digital pre-distortion scheme are also presented.