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7 - System Aspects

Published online by Cambridge University Press:  08 August 2019

Mikael Sahrling
Affiliation:
Tektronix Inc., Oregon
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Summary

This chapter describes how to apply estimation analysis to various systems. We start by discussing phase locked loops (PLL) and show how one can model them simply. One of the key properties of PLLs are their jitter performance. A definition of jitter is followed by a way to model the concept using simple noise sources. Next voltage controlled oscillators are described in some detail and various ways to model them using estimation analysis. This is followed by a design example of a VCO where the lessons from the previous chapters are incorporated including design examples. We then proceed to a discussion of analog-to-digital converters, which are described through some simple models. By incorporating design examples from the previous chapters a full straight flash ADC is implemented, where the ADC performance criteria are applied. This is another example of howthrough estimation analysis one can arrive at a good starting point for fine-tuning of a circuit using a simulator. Sampling methods, such as voltage sampling and charge sampling, are discussed following the estimation analysis method. The chapter concludes with exercises.

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Chapter
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Publisher: Cambridge University Press
Print publication year: 2019

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References

7.8 References

Li, M.P., Jitter, Noise and Signal Integrity at High Speed, Upper Saddle River, NJ: Prentice Hall, 2007.Google Scholar
Best, R. E., Phase-Locked Loops, 6th edn., New York: McGraw-Hill, 2007.Google Scholar
Bianchi, G., Phase-Locked Loop Synthesizer Simulation, New York: McGraw-Hill, 2005.Google Scholar
Sklar, B., Digital Communications, 2nd edn., Englewood Cliffs, NJ: Prentice Hall, 2017.Google Scholar
Baker, J. R., CMOS Circuit Design, Layout and Simulation, 3rd edn., Hoboken, NJ: Wiley-IEEE Press, 2010.Google Scholar
Lee, T., The Design of CMOS Radio-Frequency Integrated Circuits, 2nd edn., Cambridge, UK: Cambridge University Press, 2003.Google Scholar
Gray, R., Lewis, J. Hurst, and Meyer, R., Analysis and Design of Analog Integrated Circuits, 5th edn., Hoboken, NJ: Wiley, 2009.Google Scholar
Rogers, W. M. and Plett, C., Radio-Frequency Integrated Circuits Design, New York: Artech House, 2002.Google Scholar
Voinigescu, S., High-Frequency Integrated Circuits, Cambridge, UK: Cambridge University Press, 2012.Google Scholar
Darabi, H., Radio Frequency Integrated Circuits and Systems, Cambridge, UK: Cambridge University Press, 2015.Google Scholar
Razavi, B., RF Microelectronics, 2nd edn., Englewood Cliffs, NJ: Prentice Hall, 2011.Google Scholar
Hajimiri, A. and Lee, T., “A General Theory of Phase Noise in Electrical Oscillators,” IEEE JSSC, Vol. 33, No. 2, p. 179, 1998.Google Scholar
Suarez, A., Analysis and Design of Autonomous Microwave Circuits, Hoboken, NJ: Wiley-IEEE Press, 2009.Google Scholar
Baker, J. R., CMOS: Mixed-Signal Circuit Design, 2nd edn., Hoboken, NJ: Wiley-IEEE Press, 2008.Google Scholar
Manganaro, G., Advanced Data Converters, Cambridge, UK: Cambridge University Press, 2012.Google Scholar
Jespers, P. G. A., Integrated Converters, Oxford, UK: Oxford University Press, 2001.Google Scholar
van de Plassche, R., CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters, 2nd edn., Dordrecht, the Netherlands: Kluwer Academic Publishers, 2003.Google Scholar
Maloberti, F., Data Converters, Dordrecht, the Netherlands: Springer, 2008.Google Scholar
Gobet, C. A., “Spectral Distribution of a Sampled 1st-Order Lowpass Filtered White Noise,” Electronics Letters, Vol. 17, pp. 720721, 1981.Google Scholar
Xu, G., “Performance Analysis of General Charge Sampling,” IEEE Transactions on Circuits and Systems, Vol. 52, p. 107, 2005.Google Scholar

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  • System Aspects
  • Mikael Sahrling
  • Book: Fast Techniques for Integrated Circuit Design
  • Online publication: 08 August 2019
  • Chapter DOI: https://doi.org/10.1017/9781108682336.008
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  • System Aspects
  • Mikael Sahrling
  • Book: Fast Techniques for Integrated Circuit Design
  • Online publication: 08 August 2019
  • Chapter DOI: https://doi.org/10.1017/9781108682336.008
Available formats
×

Save book to Google Drive

To save content items to your account, please confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your account. Find out more about saving content to Google Drive.

  • System Aspects
  • Mikael Sahrling
  • Book: Fast Techniques for Integrated Circuit Design
  • Online publication: 08 August 2019
  • Chapter DOI: https://doi.org/10.1017/9781108682336.008
Available formats
×