Published online by Cambridge University Press: 08 August 2019
The observations from theis applied specifically to integrated circuit situations, where transmission line effects, inductors, capacitors and S-parameters are discussed using the estimation analysis method. Many useful formulae are derived that are used to design real world inductors and estimated parasitic capacitances. Also a brief overview of the connection between the printed circuit board and on-die applications is presented as well as a summary of the current state of detailed modeling of interconnect effects. The theoretical underpinnings behind common shielding techniques is discussed using the estimation analysis in the last part of the chapter. It is followed by design examples and exercises.
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