Book contents
- Frontmatter
- Contents
- Contributors
- Preface
- Part I Introduction to digital front-end
- Part II DPD and CFR
- 6 General principles and design overview of digital predistortion
- 7 Power amplifier nonlinear modeling for digital predistortion
- 8 Look-up table based digital predistortion schemes and implementation
- 9 Digital predistortion and its combination with crest factor reduction
- 10 Adaptive digital baseband predistortion
- 11 Crest factor reduction techniques
- Part III DUC, DDC, ADC, DAC, and NCO
- Part IV Digital calibration, imbalance compensation, and error corrections
- Part V Circuits and system integration in digital front-end
- Index
- References
8 - Look-up table based digital predistortion schemes and implementation
from Part II - DPD and CFR
Published online by Cambridge University Press: 07 October 2011
- Frontmatter
- Contents
- Contributors
- Preface
- Part I Introduction to digital front-end
- Part II DPD and CFR
- 6 General principles and design overview of digital predistortion
- 7 Power amplifier nonlinear modeling for digital predistortion
- 8 Look-up table based digital predistortion schemes and implementation
- 9 Digital predistortion and its combination with crest factor reduction
- 10 Adaptive digital baseband predistortion
- 11 Crest factor reduction techniques
- Part III DUC, DDC, ADC, DAC, and NCO
- Part IV Digital calibration, imbalance compensation, and error corrections
- Part V Circuits and system integration in digital front-end
- Index
- References
Summary
Introduction
Many years of research have dealt with predistortion techniques for memoryless PA. Recently, several solutions have included memory effects compensation, since those effects seem to be of significant concern when considering high bandwidths with multilevel and multi-carrier modulation formats. Digital predistortion solutions, usually based on a particular PA behavioral model, have to be designed to be later implemented in a digital signal processor.
An efficient way to implement the predistortion function without introducing an excessive computational cost is by using look-up tables (LUTs). An LUT is a data structure used to replace a runtime computation with a simpler array indexing operation. Therefore, computational complexity and processing time is reduced by using LUTs, since retrieving a value from memory is in general faster than running the algorithm required to generate this value. In addition, LUT-based DPD has shown better performance than using other low-order parametric models such as polynomials. An LUT-based DPD consists, among other blocks, of a memory block that contains a representation of the inverse characteristic of the amplifier and an address calculator to index the memory block. Then, as we will discuss in the following, according to the type of LUT architecture considered it will incorporate several real or complex adders and multipliers to perform the predistortion of the input complex data signal.
- Type
- Chapter
- Information
- Digital Front-End in Wireless Communications and BroadcastingCircuits and Signal Processing, pp. 214 - 243Publisher: Cambridge University PressPrint publication year: 2011