A/D and D/A data conversion for wireless communications transceivers

doi:10.1017/CBO9780511744839.014

13 - A/D and D/A data conversion for wireless communications transceivers

from Part III - DUC, DDC, ADC, DAC, and NCO

Published online by Cambridge University Press: 07 October 2011

Jerzy Dąbrowski

Edited by

Fa-Long Luo

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Fa-Long Luo: Affiliation:
Element CXI, San Jose, California

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Summary

Contemporary wireless communications have expanded to provide a multitude of services ranging from mobile telephony and satellite navigation to Internet access and image or video transfer. These functions have been made possible by the digital signal processing (DSP) techniques implemented in dedicated hardware. In addition to the primary functions also various digital techniques must be employed to ensure integrity and reliability of communications systems, increasing thereby the demands for the system throughput. To enable ever higher data rates both wider channel bandwidths and advanced DSP techniques such as Orthogonal Frequency-Division Multiplexing (OFDM) and multi-bit quadrature amplitude modulation (QAM) are used. These solutions place more demands on the signal-to-noise ratio (SNR) and peak-to-average power ratio (PAPR) of the signals, and in effect, on the dynamic range (DR) and linearity of the analog front-end of a transceiver.

The requirements on the interface between the digital and analog front-end part are just as important. In fact, the quality of the A/D and D/A data conversion largely decides the performance of the received and transmitted signal. The demands placed on the data converters in wireless transceivers are exacerbated in terms of multimode operation, and are pushed to an extreme for the software defined radio (SDR) where the converters should be placed close to antenna [1].

Type: Chapter
Information: Digital Front-End in Wireless Communications and Broadcasting
Circuits and Signal Processing
, pp. 380 - 412

DOI: https://doi.org/10.1017/CBO9780511744839.014 [Opens in a new window]

Publisher: Cambridge University Press

Print publication year: 2011

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References

Mitola, J.The Software Radio ArchitectureIEEE Communications Magazine 33 1995 26CrossRef Google Scholar

Muhammad, K.Leipold, D.Staszewski, B. 2004 268

Jakonis, D.Folkesson, K.Dabrowski, J.A 2.4-GHz RF Sampling Receiver Front-End in 0.18-um CMOSJournal of Solid-State Circuits 40 2005 1265CrossRef Google Scholar

Abidi, A.The Path to the Software-Defined Radio ReceiverJournal of Solid-State Circuits 42 2007 954CrossRef Google Scholar

Durdodt, C.Friedrich, M.Grewing, C.A Low-IF Rx Two-Point DS-Modulation Tx CMOS Single-Chip Bluetooth SolutionTransactions on Microwave Theory and Techniques 49 2001 1531CrossRef Google Scholar

Groe, J.Polar Transmitters for Wireless CommunicationsIEEE Communications Magazine 45 2007 58CrossRef Google Scholar

Shrestha, R.Klumperink, E.Mensink, E.A Polyphase Multipath Tchnique for Software-Defined Radio TransmittersJournal of Solid-State Circuits 41 2006 2681CrossRef Google Scholar

Breems, L.Huijsing, J. H.Continuous-Time Sigma-Delta Modulation for A/D Conversion in Radio ReceiversDordrechtKluwer Academic Publisher 2001Google Scholar

Crombez, P.Van der Plas, G.Steyaert, M.A Single-Bit 500 kHz-10 MHz Multimode Power-Performance Scalable 83-to-67 dB DR CT Δ∑ for SDR in 90 nm Digital CMOSJournal of Solid-State Circuits 45 2010 1159CrossRef Google Scholar

Christen, T.Burger, T.Huang, Q. 2007 240

Bos, L.Vandersteen, G.Rombouts, P.Multirate Cascaded Discrete-Time Low-Pass ΔΣ Modulator for GSM/Bluetooth/UMTSJournal of Solid-State Circuits 45 2010 1198CrossRef Google Scholar

Brandolini, M.Rossi, P.Manstretta, D.Toward Multistandard Mobile Terminals – Fully Integrated Receivers Requirements and ArchitecturesTransactions on Microwave Theory and Techniques 53 2005 1026CrossRef Google Scholar

Kenington, P.RF and Baseband Techniques for Software Defined RadioNorwood, MAArtech House 2005Google Scholar

Van de Vel, H.Buter, B.van der Ploeg, H.A 1.2-V 250-mW 14-b 100-MS/s Digitally Calibrated Pipeline ADC in 90-nm CMOSJournal of Solid-State Circuits 44 2009 1047CrossRef Google Scholar

Murmann, B.Boser, B. E.Digitally Assisted Pipeline ADCs: Theory and ImplementationHingham, MAKluwer Academic Publishers 2004Google Scholar

Lin, K-L.Kemna, A.Hosticka, B.Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded SystemsDordrechtKluwer Academic Publishers 2003Google Scholar

Gustavsson, M.Wikner, J.Tan, N.CMOS Data Converters for CommunicationsNew JerseyKluwer Academic Publishers 2000Google Scholar

Vancorenland, P.Coppejans, P.De Cock, W. 2002 235

Lohning, M.Hentschel, T.Fettweis, G. P.Digital Down Conversion in Software Radio TerminalsProc. 10 European Signal Processing Conference 3 2000 1517Google Scholar

Vaughan, R. G.Scott, N. L.White, D. R.The Theory of Bandpass SamplingTransactions on Signal Processing 39 1991 1973CrossRef Google Scholar

Levantino, S.Samori, C.Banu, M.A CMOS GSM IF-Sampling Circuit with Reduced In-Channel AliasingJournal of Solid-State Circuits 38 2003 895CrossRef Google Scholar

Poulton, K.Neff, R.Setterberg, B.A 20 GS/s 8b ADC with 1 MB Memory in 0.18 um CMOSInt. Solid-State Circuits Conf. 1 2003 318CrossRef Google Scholar

Schreier, R.Temes, G.Delta-Sigma Data ConvertersIEEE-PressWiley 2005Google Scholar

Gu, Q.RF System Design of Transceivers for Wireless CommunicationsNew YorkSpringer 2005Google Scholar

Leung, V.Larson, L.Gudem, P.Improved Digital-IF Transmitter Architecture for Highly Integrated W-CDMA Mobile TerminalsTransactions on Vehicular Technology 54 2005 20CrossRef Google Scholar

Zhou, Y.Yuan, J.A 10-bit Wide-Band CMOS Direct Digital RF Amplitude ModulatorJournal of Solid-State Circuits 38 2003 1182CrossRef Google Scholar

Taleie, S.Copani, T.Bakkaloglu, B.A Linear ΣΔ Digital IF to RF DAC Transmitter with Embedded MixerTransactions on Microwave Theory and Techniques 56 2008 1059CrossRef Google Scholar

Shi, C.Ismail, M.Data Converters for Wireless StandardsSecaucus, NJKluwer Academic Publishers 2001Google Scholar

Maloberti, F.Data ConvertersDordrechtSpringer 2007Google Scholar

Seo, D.McAllister, G.A Low-Spurious Low-Power 12-bit 160-MS/s DAC in 90-nm CMOS for Baseband Wireless TransmitterJournal of Solid-State Circuits 42 2007 486CrossRef Google Scholar

Bosch, A.Steyaert, M.Sansen, W.SFDR-Bandwidth Limitations for High Speed High Resolution Current Steering CMOS D/A ConvertersProc. 6th IEEE Int. Conf. Electronics, Circuits and Systems 3 1999 1193CrossRef Google Scholar

Luschas, S.Schreier, R.Hae-Seung, L.Radio Frequency Digital-to-Analog ConverterJournal of Solid-State Circuits 39 2004 1462CrossRef Google Scholar

Jerng, A.Sodini, C.A Wideband ΔΣ Digital-RF Modulator for High Data Rate TransmittersJournal of Solid-State Circuits 42 2007 1710CrossRef Google Scholar

Eloranta, P.Seppinen, P.Kallioinen, S.A Multimode Transmitter in 0.13 μm CMOS Using Direct-Digital RF ModulatorJournal of Solid-State Circuits 42 2007 2774CrossRef Google Scholar

Lee, S.Fang, S.Allstot, D.A Quad-Band GSM-GPRS Transmitter With Digital Auto-CalibrationJournal of Solid-State Circuits 39 2004 2200Google Scholar

Staszewski, R.Wallberg, J.Rezeq, S.All-Digital PLL and Transmitter for Mobile PhonesJournal of Solid-State Circuits 40 2005 2469CrossRef Google Scholar

Razavi, B.A 60-GHz CMOS Receiver Front-EndJournal of Solid-State Circuit 41 2006 17CrossRef Google Scholar

Lin, C-H.van der Goes, F.Westra, J.A 12 bit 2.9 GS/s DAC With IM3 < 60 dBc Beyond 1 GHz in 65 nm CMOSJournal of Solid-State Circuits 44 2009 3285CrossRef Google Scholar

Wu, X.Palmers, P.Steyaert, M.A 130 nm CMOS 6-bit Full Nyquist 3 GS/s DACJournal of Solid-State Circuits 43 2008 2396CrossRef Google Scholar

Razavi, B.RF MicroelectronicsNew JerseyPrentice Hall 1998Google Scholar

Wei, Y.Tang, H.Doboli, A.Systematic Methodology for Designing Reconfigurable Delta Sigma Modulator Topologies for Multimode Communication SystemsTransactions on Computer Aided Design 26 2007 480CrossRef Google Scholar

Yi, K.Craninckx, J.Gielen, G.A Design Approach for Power-Optimized Fully Reconfigurable ΣΔ A/D Converter for 4G RadiosTransactions on Circuit Systems II 55 2008 229Google Scholar

Akyildiz, I. F.Lee, W. Y.Vuran, M. C.A Survey on Spectrum Management in Cognitive Radio NetworksIEEE Communications Magazine 46 2008 40CrossRef Google Scholar

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