Introduction
Phase nonlinearity response of an instantaneous frequency measurement (IFM) receiver plays a very critical role in resolving unknown received frequency from unidentified threats (emitters). The accuracy of unknown resolved frequency mostly depends upon the overall phase nonlinearity of the detected Intermediate Frequency (IF) signals (it includes delayed radio frequency [RF] and LO paths). It has been noticed that the frequency-resolving algorithm becomes ineffective or the code gets completely collapsed when the phase nonlinearity of the receiver crosses a certain limit [Reference Sarkar, Kumar, Sivakumar, Jhariya, Raghu and Sudheesh1]. Phase controllability of a large delay line or phase correlator (where the frequency measurement system has lots of active/passive components in the chain) is difficult and has multiple design challenges. Another major hurdle for such system is to keep phase controllability uniform over a wide dynamic range as well as against a wide frequency band because this system is primarily made for electronic support measures systems. In the homodyne local oscillator (LO) generation technique, the LO gets generated from an input RF reference. Thereby, higher amplification of the input signal is required to produce high level of LO (9–12 dBm for the dynamic range over −55 to +5 dBm). Thus, most of the gain blocks have to operate beyond P1dB (or in hard saturation) when the input signal is higher than the sensitivity level, and naturally, nonlinearity affects the phase performance at the very beginning (in the RF chain) of the receiver system [Reference Sarkar, Kumar, Sivakumar, Manjunath and Charlu2, Reference Zou, Pan and Yao3]. Basically, a delay line–based frequency measurement receiver becomes lossy. Hence, lots of gain blocks (with higher P1dB) are required to compensate for the loss in each of the channel of phase correlators.
Phase nonlinearity reduction technique has been explained in this article for RF/LO channels (followed by phase correlators). A comparative study on the effects of phase nonlinearity against various RF and LO powers has been experimented in this article. Based on the study, a suitable LO and RF power level has been fixed as the standard for phase correlators to keep phase nonlinearity minimum. The RF power is standardized to a particular level (little beyond the P1dB); thus, >±180 mV (>−3 dBm output) is ensured at the IF output port (intermediate frequency; in terms of sinθ, cosθ) after compensating for the conversion loss of the mixers. Generally, phase nonlinearity occurs due to the presence of a high level of harmonics, spurious, pass-band ripple components, multitoned RF inputs, etc., in the input signals [Reference Sarkar, Kumar, Sivakumar, Manjunath and Charlu2]. To achieve perfect phase linearity, ideally, this kind of receiver must be linear against a wide dynamic range (−55 dBm to +5 dBm) and over a wide frequency range [Reference Sarkar, Jhariya and Sivakumar4, Reference Sarkar and Raghu5]. Practically, this is not possible to achieve; thus, a few gain blocks in the RF/LO channels must be operating over the nonlinear region (beyond P1dB). Now a judicious choice of gain blocks must be assessed; henceforth, only those selected gain blocks will always be operated in the nonlinear region [Reference Sarkar, Jhariya and Sivakumar4]. The power level of hard saturation of the affected gain blocks must be controlled in such a way that nonlinearity becomes minimum among them (as it is a cascaded effect). The incident power of each stage of the gain block must be limited carefully (without affecting inter-stage matching); thus, they operate under uniform saturation instead of uneven hard saturation (in case of one or two gain blocks!). Hermetic module design approach has been followed to design the whole receiver; thus, in unwanted oscillations between gain blocks, spurious performances are kept minimum (within −60 dBc). This technique exhibits a controlled nonlinearity, which will affect the final phase nonlinearity a little as compared to unevenly hard saturated gain blocks. This technique has been followed from the first to the last elements for controlling phase nonlinearities. Attenuators (thermosensitive/insensitive) and equalizers (linear and parabolic type) are designed after observing the nature of the response. They keep the power level within the limit; thus, it is possible to maintain a flat response over wideband. This method has made this design successful to maintain overall phase nonlinearity within the specified level for phase correlators (±15° for the shortest delay line, D1, and ±30° for the longest delay line, D5).
Extensive works have been reported regarding ultra wideband IFM receiver design techniques to track the unknown frequencies with very good resolutions [Reference Jason and Reza6–Reference Keshani and Masoumi12]. Sarkar et al. shows a detailed investigation of a double-sided assembly where abrupt phase nonlinearity has been explained [Reference Sarkar, Kumar, Sivakumar, Jhariya, Raghu and Sudheesh1]. Here phase nonlinearity reduction has been carried out by eliminating unwanted voids beneath the substrate. Jason et al. explained the influence of the input signal phase deviation and input Signal to Noise Ratio (SNR) on the differential phase measurement accuracy of mono-bit receiver architecture in [Reference Jason and Reza6]. This proposed method has used two channels only; thus, the process becomes simple to calculate and measure phase deviations. Its band is also limited up to 3.15 GHz. The proposed technique in this article is very complex, where five simultaneous channels have been used to compare phase deviations over a wideband of frequencies (1–10 GHz). A nonlinearity mitigation technique for a broadband front-end receiver has been proposed by Zhao et al. in [Reference Zhao, Hong, Zhang, Jin, Dai and Hu7]. In this method, the input RF signal is digitized first and then passed through the best delay searching–power residuals optimization circuit. In the last stage, the digitized and semi-processed signal is passed through a nonlinearity compaction circuit. The method explained in this article is an analog process to carry out the calculations although a strong asymmetric algorithm is used to resolve the final frequency count. Here equalization, power flattening, inter-module phase matching, tracking, etc., have been followed to reduce phase nonlinearity. Nonlinearity error reduction by ratio to phase conversion in signal ratiometry is reported in [Reference Katsura8]. This proposed “ratio to phase” conversion technique is used to reduce nonlinearity without using stable/linear signal. This technique has mostly been focused on amplitude nonlinearity mitigation. A very low root mean square (rms) frequency resolve algorithm is reported by splitting the incoming frequencies into few sub-bands in [Reference Su and Jiang9]. This technique has a band limitation due to its frequency-limited hardware implementation. This technique is used to capture frequency (DC–5 GHz) within 200 nS with 0.8 MHz rms, and this proposed technique offers capturing any frequency (1–10 GHz) within 120 nS (845 pS longest delay) with <2.5 MHz rms. Ultra wideband (1–40 GHz) IFM technique is demonstrated in [Reference Bui, Pelsui, Vo, Sarkhosh, Emami, Eggleton and Mitchell10] by using four-wave mixing over highly nonlinear fiber. In this proposed technique, no high-speed electronic circuits are required at any stage of the receiver and it ends up with very poor output frequency accuracy (2000 MHz at 40 GHz, 5% of incoming frequency). The method explained in [Reference Bui, Pelsui, Vo, Sarkhosh, Emami, Eggleton and Mitchell10] will offer 50 MHz frequency error at 10 GHz (5% of 10 GHz), but the proposed techniques in this article offer <10 MHz frequency error at 10 GHz. Multipath propagation effects are discussed in [Reference Milczarek, Lesnik, Djurovic and Kawalec11] but not for phase nonlinearity calculations. Change of resolved frequency response due to RF nonlinearity has been predicted in [Reference Keshani and Masoumi12], but no detailed analysis or results have been shared. A reconfigurable IFM technique based on dual-polarization dual-drive Mach-Zehnder modulator (DP-DMZM) has been reported in [Reference Yang, Yu and Liu13]. Discussion about RF nonlinearity has not come into the scope as microwave signal is used to drive the upper and lower arms of DP-DMZM. Although this technique is made to cover the 2–23 GHz band, the frequency accuracy is ±200 MHz. The proposed receiver achieves <3 MHz rms frequency. Differential phase measurement accuracy of a mono-bit receiver is reported in [Reference Jason and Adhami14]. This article accommodates nonlinearity effects into simulation, but nothing is shared regarding phase nonlinearity compensation. Efficient techniques/algorithms have been proposed in these articles to resolve instantaneous frequency, but they fail to highlight phase nonlinearity reduction/compensation methods (it must occur when input signal passes through certain hardware), which are very essential for final frequency calculations. This article explains phase nonlinearity reduction for multi-channel delay line–based phase correlators.
Five sets of correlators are chosen for experimentation. Thereby, the whole design has been divided into four major sectors, viz., RF front-end, phase correlator, digital processor, and onboard computer display section, respectively. The overall block diagram of the receiver is shown in Fig. 1. The RF front-end has multiple outputs to feed the signal into various phase correlators. All corrections described in this article have been performed within the front-end to phase correlator sections only. No digital correction has been carried out to shape-up phase nonlinearity. Finally, four modules are developed and verified over −40°C to +71°C (ESS) pre- and post-temperature vibrations and EMI/EMC, respectively, to establish the methodology for mass production.
Phase nonlinearity estimation
Phase nonlinearity measurement is one of the crucial tasks for each phase correlators to detect unknown frequencies from an external threat. A simple block diagram of phase correlator is shown in Fig. 2. In this figure, the input RF signal is split into two components to produce LO (P2) and delayed RF signals (P4) for the correlator. Basic homodyne technique has been followed to make LO signal from incoming RF components (P2). This is done by applying cascaded amplifications over P2 to generate P3. Thus, characteristics of the output signal of the multistage amplifier (P3) are no longer a linear signal. Hence, P3 is a highly nonlinear signal. Finally, to generate in-phase (I) and quadrature-phase (Q) output, this highly nonlinear signal has been passed through a 3 dB hybrid, and it generates two outputs, viz., A cosθ{r(t)} and A cos(θ − π/2), where A is the amplitude of the signal. Now both the paths P1–P2–P4–P5/Q5 and P1–P2–P3–P5/Q5 should be in phase except Dn (delay component) in the delayed channel. The final output {y p(t)} of the “I” mixer is detected by auto-correlating reference {r(t)} and the delayed signal {d(t)}. Phase data of any correlator (Ѳ inf) is a modulo-2π wrapped and finally calculated by tan − 1{y p(t)/y q(t)}, where y q(t) is the output of the “Q” mixer. Ideally, Ѳ inf must be linear, but practically, it is merely impossible due to several nonlinearities in the system. These nonlinearities are responsible for phase deviations in the Ѳ inf. One of the reasons of phase nonlinearity is the presence of harmonics at the output of the amplifier when it operates beyond P1dB. It triggers amplitude modulation (AM) to phase modulation (PM) conversion in the output signal. There are several other reasons for phase nonlinearity in the final signal like improper line ratios and inappropriate unwrapped phase values at the end of the successive delay lines of various phase correlators [Reference Sarkar, Raghu and Sudeesh15]. Hence, phase nonlinearity estimation is essential not only for analog circuitry correction but also for digital processing (unwrapped phase data Ѳ inf). The line ratios (r l = L Dn/L Dn − 1) between various phase correlators can exhibit different types of phase nonlinearities for final frequency calculations. When phase error lies on both sides of the reference phase, then for 3.5 line ratio, the algorithm can tolerate ±40° {±180°/(1 + r l)} phase nonlinearities (max.). Thereby, if phase nonlinearity crosses ±40°, then the algorithm either breaks or produces errors in the final resolved frequency (specification <3 MHz rms cannot be achieved). Practically, retaining exact line ratio for all the phase correlators is merely impossible over this temperature (−40°C to +71°C) due to uneven lengths. In improper line ratio, abrupt phase change can digitally be corrected but phase deviation due to nonlinear operation of active components must be corrected in the analog domain to reduce the burden over the digital algorithm. As mentioned earlier, high amplifying gain block gets very low signal (≈−55 dBm) from the external world and converts it into high-level signal (>15 dBm). LO generation block further rectifies, equalizes the input power, and makes a fixed output power suitable for phase correlators. Thereby, phase deviation due to AM–PM conversion can be estimated as mentioned in [Reference Acciari, Colantonio, De Dominicis and Rossi16, Reference Medhurst, Roberts and Walsh17]. Let us assume RFin(t) incident at the input (P1) of the phase correlator as mentioned in Eq. (1).
where k 1, ϕ 1(f c), m(t), and θ(t) are attenuation (loss) and phase shift related to the electrical path from input to P2, instantaneous amplitude, and phase of the input signal, respectively. The amplified (n-fold) output signal (at P3) is given by Eq. (2), where F[k 1m(t)] and φj[k 1m(t)] are the AM compression characteristic and AM–PM conversion component, respectively.
Then LO signal is then passed through a 3dB hybrid, mixer, etc. It changes total attenuation (k 2) and phase {ϕt(f c)} for the corresponding paths. φ j[k 1m(t)], the phase deviation, is generally the function of the instantaneous signal of m(t) [Reference Clark, Silva, Moulthrop and Muha18]. Thereby, highly nonlinear m(t) produces large phase deviation at the output {y p(t)}. Signal r(t) and d(t) at the LO and RF port of mixer are given by Eqs. (3) and (4), respectively.
Although gain blocks in the delayed path of the phase correlator (as shown in Fig. 2) have not been considered but amplification is required to compensate the extra losses contributed by the delay lines. Then the calculation of the overall phase deviation becomes very complex; thereby, the RF-delayed path is kept amplifier free. Output after filtering at the mixer port will be a low-frequency component of the complex signal as mentioned in Eq. (5), where T(t) and χ(t) are amplitude and complex phase of the output signal, respectively. The value of the complex nonlinear phase has also been estimated in Eq. (6).
It is known that when instantaneous amplitude m(t) reaches the maximum value of m max, then obviously φj[k 1m(t)] also attains its maximum value of Δφj[k 1m max]; this is the phase variation arising from the nonlinear behavior of the cascaded amplifiers. Thus, Eq. (7) gives the maximum phase deviations for the maximum amplitude of m(t), where ψ 0 is small signal phase shift of all the amplifiers.
The overall phase deviation due to other components including nonlinear behavior of the gain blocks is estimated by Eq. (8).
It is theoretically possible to derive phase deviation due to nonlinear behavior of the amplifiers and can be written as in Eq. (9).
where ∂ψ is expressed as in Eq. (10)
Phase deviation derivation requires amplitude information from the first to the last stage as per Eq. (9). Thus, to calculate the phase nonlinearity of a subsystem, each stage must be probed and accurate amplitude information must be picked up, which is a laborious task and not always practically feasible. Hence, a comparably easier method has been adopted to calculate the final phase nonlinearity by fetching only last stage amplitude information y p(t) and y q(t), respectively. This calculation is carried out in excel sheet without using any software. It is known that wrapped phase information can easily be calculated from I and Q waveforms using Eq. (11).
where ϕ wrap(new) is the wrapped phase of the phase correlator and χ(Q Dm/P Dm) is defined below to fetch accurate phase information depending upon Q Dm and P Dm outputs as mentioned in Eq. (12). Maximum limit of m is 5 for this receiver, and its limit may increase or decrease depending upon the output frequency resolution and input frequency band.
Few instantaneous unwrapped phases are calculated by using Eq. (11–16) (as samples) to understand the steps carried out in the excel sheet. Let us consider three sets of random instantaneous values of (Q Dm, P Dm) (0.25581, −0.07267), (−0.18957, 0.01074), and (−0.10616, −0.11196) for m = 3, 4, and 5, respectively. Thereby, second, third, and fourth conditions of Eq. (12) have been satisfied for the first, second, and third set of values, respectively, to calculate χ(Q Dm/P Dm). These calculated values are −0.27679, 3.084999, and −2.32961. The instantaneous wrapped phase can be calculated by putting χ(Q Dm/P Dm) values into Eq. (11), and the calculated wrapped phase are 164°, 357°, and 47°, respectively. The instantaneous wrapped phase of any delay line must be unwrapped to calculate final phase nonlinearities of that respective delay lines. Instant number of cycle (CN, count increased by 1 when it crosses 360°) for any delay line (D m) must be known to unwrap phase from wrapped phase data (ϕ wrap(new)). This can be calculated by using unwrapped phase of D m-1th delay line (ϕ unwrap(new)), line ratio, and wrapped phase of D mth delay line (ϕ wrap(new)), respectively. Another simple way of calculating the value of CN is by counting how many 360° cycles are completed within the wrapped phase itself. In the same way, line ratio is calculated from the slope of the unwrap phase of subsequent lines. If the slope of the unwrap phase of mth and (m + 1)th are Rm and Rm +1, respectively, then the line ratio is calculated by Eq. (13).
Now CN is defined in terms of R l by
where m = 2, 3, 4, … for an instance, consider m = 5, then N = 1, 2, … 4 and the C 4 can be written as in Eq. (15)
The precise unwrapped phase ϕ unwrap(pre) for D m delay line is calculated using Eq. (16).
Previously calculated wrapped phase values (164°, 357°, and 47°) can be used to compute instantaneous unwrapped phases using Eq. (16). Computed CN values for above three wrapped phases are 0, 0, and 7, respectively. Now final unwrapped phases for the above values are 164°, 357°, and 2567°, respectively. Ideal instantaneous unwrap phase now must be calculated to find out phase deviations for the respective delay lines. For n discrete frequency points (where n discrete points cover the whole bandwidth), ideal unwrap phase is calculated by using Eq. (17), where ξ Di, ${\bar \phi _{{\textrm{unwrap}}\left( {{\textrm{pre}}} \right)}}$, f ci, and ${\bar f_{{\textrm{ci}}}}$ are ideal, average of calculated instantaneous unwrapped discrete phase, instantaneous average phase over f c1 to f cn discrete frequency points, ith input frequency, and average of total number of frequency points, respectively.
where f ci = {f c1, f c2, f c3, …, f cn}
and
Now the final ideal unwrap phase is
Ideal unwrapped phases have been calculated by using Eq. (19) against the practically computed unwrapped phase values (164°, 357°, and 2567°). Calculated new ideal unwrap phase values are 159.3°, 368.77°, and 2618.22°. If the system were purely ideal, then the above calculated unwrap phase values would have been 159.3°, 368.77°, and 2618.22° instead of 164°, 357°, and 2567°, but practically that is not possible.
Equation (20) is used to find out the phase nonlinearity for any phase correlator, where Δξ is the computed phase nonlinearity. Thus, calculated final phase nonlinearities for m = 3, 4, and 5 are 4.61°, −11.77°, and −51.22°, respectively, for the above ϕ unwrap(pre) values. The whole exercise is carried out in the excel sheet. Error in computed phase nonlinearity by following this method is <1% from actual value due to rounding off ϕ unwrap(pre). Phase nonlinearity calculation is easily carried out instead of using Eq. (9).
Design problem identification
All sub-modules used in these phase correlators are tested separately and then integrated within a metallic housing. Then stage-by-stage evaluation is carried out. At last, final frequencies are resolved and error frequency calculated by subtracting the resolved frequencies from applied input frequencies. Resolved and error frequencies have been plotted against input frequency and shown in Fig. 3 for three various power levels, that is, low (−55 dBm), medium (−25 dBm), and high (+5 dBm), respectively. From the figure it is evident that error frequencies in most of the discrete frequency points are very high at all the power levels (from the specified values, especially at higher power levels). It is about ±200 MHz in few frequency points and more than ±50 MHz in many of the frequency points. Thus, the calculated rms value of the error frequency is far more than 3 MHz. As per specification, only ±9 MHz or 3σ absolute frequency spreading is acceptable, but the plotted error as shown in Fig. 3 is far beyond the acceptable specifications. Thus, root cause analysis of this fault has now been initiated in the backward direction from the error frequency calculation. During investigation, it was found that the phase nonlinearity data inspection was unfortunately skipped while evaluating the module. This was the last step, which had to be performed before error frequency calculation but missed due to the high confidence level of precision. Now phase nonlinearity of each phase correlator has been checked and plotted against input frequency. Measured phase nonlinearities for five phase correlators at mid power level (−25 dBm) are shown in Fig. 4. Measured phase nonlinearity for D4 and D5 phase correlators are the worst comparably from D1, D2, and D3, respectively. Overall phase nonlinearity of D5 phase correlator is almost ±60° for most of the frequency pockets and reaches −85° between 1 and 2 GHz bands at room temperature (RT) itself! Phase nonlinearity of D4 line is also very poor for 1–3 GHz, 6–7.5 GHz, and beyond 9 GHz frequency bands, respectively, as per Fig. 4 at RT. Maximum phase nonlinearity that can be accommodated for any correlator is ±40° for r l = 3.5 over the temperature −40°C–71°C. Now it is clear that why is error frequency far beyond 3 MHz rms? Thereby, fault finding process has been carried out one step backward to verify amplitude and shapes of y p(t) and y q(t) for all the phase correlators. Power levels for all LO and RF ports of phase correlators had been set enough; hence, output of I and Q levels are >±180 mV at the evaluation stage. This is another internal specification for digital processor card to avoid least significant bit resolution issue of analog to digital converter. A sample I and Q output of D5 correlator is shown in Fig. 5. Here I and Q levels are abruptly changing over frequency, and in some places, I and Q levels do not reach the specifications (>±180 mV). The most significant issue noticed is that the phase difference between I and Q output is randomly varying over frequency instead of maintaining at 90°. Ideally, phase shift between I and Q output must exactly be 90° over the whole frequency band. This is one of the major reasons of very high-phase nonlinearities for D4 and D5 phase correlators, respectively. Same issue has also been observed for the other correlators but with less intensity. This phenomenon indicates that there must be phase irregularities between I and Q channels of all phase correlators. Hence, again all the power and phase levels of d(t) and r(t) for all the phase correlators have been reassessed. Unwrapped phase of Q path has been tracked with respect to I path (reference) for all five phase correlators. Measured tracked Q path phase response is shown in the Fig. 6. Measured phase variations for Q paths against reference path is >±25°, which is not at all acceptable to achieve <±35° phase nonlinearities for D4 and D5 phase correlators, respectively. Now power levels of I and Q paths have been investigated. Measured I and Q power levels for all LO and RF paths are shown in Figs. 7 and 8, respectively, and the levels are varying over ±4 dBm and ±8 dBm. Response of LO and RF power levels are not flat enough, as well as interchannel power variations are also very high. I and Q output voltages do not reach the specified level (>±180 mV) at the higher frequencies due to abrupt flatness (±8 dBm) of RF channels. These above mentioned problems are the main troublemakers for increasing the final phase nonlinearities of the phase correlators; thus, these issues must be addresses with proper solutions.
Corrective action
Corrective actions must be taken to resolve all the above identified issues. From the above analysis, the below course of corrections must be exercised.
1. LO and RF power of mixers must be set to a fixed level; thereby, I and Q waveforms become uniform over frequency.
2. Maintain maximum power level difference between LO and RF to produce >±180 mV I and Q outputs, respectively.
3. Phase tracking between Q and I (reference) of LO channels must be corrected. Phase tolerance between Q and I paths must be within ±10° (90 ± 10°).
4. Overall, 90° phase shifts between I and Q (IF output) waveform must be maintained in all the cycles to calculate phase nonlinearity in each phase correlator.
To carry out the above steps, a sample phase correlator with arbitrary delay has been considered for experimentation. It has been decided that final corrections in the main housing will be carried out after finalizing all the above mentioned parameters in the sample phase correlator (SPC). This SPC has been experimented with various LO–RF level differences. I and Q levels, phase differences, phase nonlinearity, etc., have been measured at the output of the SPC to optimize the LO and RF power levels. This optimization helps to generate uniform I and Q voltage levels with minimum phase nonlinearity. Two samples of I outputs are shown in Fig. 9 for two different LO and RF power levels, respectively. Here outputs in (a) and (b) of Fig. 9 are for 15 dBm LO with 3 dBm RF (LO–RF = 12 dBm) and 9 dBm LO with 6 dBm RF (LO–RF = 3 dBm), respectively. Output of Q mixer of this SPC also follows the same responses thus not included here. Phase difference between I and Q of Fig. 9(b) is almost 90° rather varying randomly in the case of Fig. 9(a). From the above figure, response of (b) is more convincing in all the respects. Hence, it can be predicted that phase nonlinearity will be controlled in case of (b) instead of case (a), respectively. A sample I and Q waveform for 15 dBm LO and 12 dBm RF is shown in Fig. 9(c). Here I and Q waveforms are not uniform due to highly nonlinear RF signal. Phase shift between I and Q waveforms are also not maintained at 90° due to nonlinearity effects. Wrinkles in I and Q waveform create high-phase nonlinearity at the output. From the above experiment, satisfactory output has come with 9 dBm LO and 6 dBm RF power (LO–RF = 3 dBm) with M1-0012 mixer part. Thereby, these power levels have been standardized for all the phase correlators. In both the cases (“a” and “b”), amplifiers are in nonlinear region but in case of (b), power level of LO is less from (a) and RF power level just beyond the P1dB (4 dBm). Thereby, this combination will push amplifiers in the reference path into less nonlinearity as compared to (a) and will procure better phase nonlinearity. Phase difference between I and Q output is shown in (d) and is almost 90°. Hence, gaps between two waveforms are equally maintained in each cycle. From the above experimentation, it is evident that when incident LO power is average drive level and RF power is just beyond P1dB of the mixer then, I and Q waveforms are almost uniform. Thus, phase nonlinearity is also controllable. This approach is implemented to all phase correlators of the main housing. Corrected and measured power levels for all 10 LOs (I and Q) are shown in Fig. 10. This is done by putting various equalizers having different slopes and attenuators [Reference Sarkar, Anand and Sivakumar19, Reference Sarkar, Anand and Sivakumar20]. Power adjustment has been carried out from P2 (in Fig. 2). Several discrete component equalizers with linear and parabolic characteristics have been designed and used to improve RF power levels. Flatness of all LO channels have been corrected using the above technique. Judicious use of attenuators keeps each amplifier just beyond P1dB. This method does not push the next amplifier unnecessarily into hard saturation. Specification for LO drive level is set to 9 ± 1.5 dBm for the entire band. Adjusted and measured power levels for all 10 RF (I and Q) delayed paths are shown in Fig. 11. Here 6 dBm minimum (8 ± 1.5 dBm) power is set at the highest frequency. It is observed that usage of more equalizers across amplifiers produce oscillations due to amplifier mismatch (input/output). Thus, flatness improvement is not carried out beyond the above mentioned limits. Difference of power level between LO (reference) and RF (delayed) is shown in Fig. 12. Here the difference is within ±1.5 dB. This power level difference before amplitude adjustment was ±3.5 dB with 8 dB positive slope as shown in Figs. 7 and 8. Power level and flatness correction have fulfilled the first two objectives (i and ii). Now, next target is to keep 90° ± 10° phase tracking between Q and I LO. Phase of I and Q LO paths have to be fine-tuned to achieve it. Tracked phase data were not smooth (as shown in the Fig. 6) due to the presence of over/undershoots in the power level at those points. When power level varies randomly, then it experiences more nonlinearities and the results abrupt phase deviation at the output. Equalizers that were used for power adjustment also helped significantly to improve phase flatness. In the development stage, each module was evaluated by tracking amplitude, flatness, P1dB (by adjusting input power and current), best harmonics performance, etc. Phase tracking for few sub-modules were not done carefully assuming it may not affect final output substantially. Henceforth, each channel is tracked with better phase-tracked components. All active and passive components are phase matched within 5°. Every channel is tuned by readjusting the lengths. Extra stubs are also used in few places to keep phase tracking <5°. Various types of transmission lines are also used to keep phase convergence within limit. Power levels have again been readjusted after phase match to keep every parameter within the committed targets. Phase tracking of Q against I channels is shown in Fig. 13. Here tracked phase responses are smooth without abrupt over/undershoots due to corrections. Measured phase of Q channels from reference (I channel) is within 90° ± 11.5°, which is close to the targeted tolerance value (±10°). This correction leads 90 phase shift between I and Q waveform at the mixer output; thus, the other two objectives are also fulfilled (iii and iv). Initially, mixers of I and Q channel were not phase-tracked. Phase imbalance between I and Q mixers also contribute to the final phase nonlinearities. Thus, they are also now phase-tracked and five different pairs have been made according to their phase responses. Phase-tracked mixers for I and Q channels are shown in Fig. 14. All the phase and amplitude tracking have been carried out by using vector network analyzer as input and output frequencies are the same (before down conversion). Instantaneous I and Q discrete data samples have been collected (for entire band) by using a simple program with the help of digital accumulation card (DAQ).
Result discussion
Finally, phase nonlinearity check has been carried out after fulfilling all the above objectives. Routing of I and Q output lines is done carefully with proper grounding. Now DAQ is connected to fetch the output of all five phase correlators simultaneously. The whole data sample collection process is semi-automatic. Initially, few I and Q data samples have been collected and examined. LO and RF port of the phase correlator has been matched slightly based on the nature of I and Q samples. This small modification (gaps between RF tracks and mixer modules) has smoothened the I and Q outputs, especially for D4 and D5 (which having longest delay lines). Extra substrate has been used to fill the unwanted gaps beneath the RF interconnects wherever gaps are >100 µm. It has improved the quality of I and Q data. This process in turn improves the final phase nonlinearity. Wrapped phase of arbitrary delay (>D3) phase correlator is shown in Fig 15. Wrapped phase comparison between before and after corrections (I and Q path power levels and phase adjustments) is shown here. As shown in Fig. 15, wrapped phase is highly nonuniform over frequency before power levels and phase corrections (dotted line response) were not carried out. Hence, phase nonlinearity was very high at lower frequencies. Most alarming issue in phase data was that same amount of phase information had been repeating for multiple frequency points due to non-uniformity. Hence, it was merely impossible to resolve the final frequency by using digital algorithm. Corrected wrapped phase has not produced such non-uniformities; thus, frequency resolve algorithm can easily be applied over it. Final phase nonlinearity for D5 having longest delay line is shown in Fig. 16. Maximum measured phase nonlinearity (in Fig. 16) is well within ±35° for r l = 3.8. Controlled phase nonlinearity is achieved for 1–2.5 GHz bands (within −40° to +22°) as compared to previous data (−85° to +58°). Overall phase nonlinearity in Fig. 16 is within ±25° throughout the band except few random pockets. Phase nonlinearities for other phase correlators have also been calculated as well. Nonlinearity response for D5 phase correlator is only shared here as it has contributed to maximum phase nonlinearities among all the phase correlators. Calculated phase nonlinearities for D1, D2, D3, and D4 phase correlators are within ±15°, ±17°, ±20°, and ±22°, respectively. Error frequency and final resolved frequency have been calculated by using asymmetric digital algorithm. Better algorithm can calculate output frequency with better accuracy for the same kind of input I and Q waveforms [Reference Medhurst, Roberts and Walsh17, Reference Clark, Silva, Moulthrop and Muha18]. To prove the concept, four modules have been developed and evaluated over temperature (–40°C to +71°C). RF and digital sections of this receiver have been shown in Fig. 17(a) and (b), respectively. Digital card is stacked over multi-stacked RF module. Final resolved frequency and error frequency have been plotted in Fig. 18. Here error frequency is <±9 MHz and calculated rms frequency is 2.6 MHz, which is well within the specification (<3 MHz). Digital processing card is used to hold frequency consistency by correcting the final output digitally over wide temperature range (–40°C to +71°C) and other environmental specification requirements (ESS, SOFT, and QT).
Conclusion
Phase nonlinearity reduction techniques have been discussed in this article in detail. Thorough phase nonlinearity estimation and calculation is carried out step by step with example by using excel sheet. Simple technique of finding out nonlinearity has also been demonstrated by considering I and Q outputs, respectively, instead of stage-wise RF power levels. Every issue of phase nonlinearity has been acknowledged with exact root cause analysis. Relation between errors in output frequency against phase nonlinearity of phase correlators has been tracked in this article. It is concluded that amplifiers in the reference path must be within soft saturation and must produce best uniform outputs over wide dynamic range. Experimentations have been carried out to finalize the optimum RF and LO port power level for phase correlators and standardize them for mass production. Power level adjustment and flatness corrections of LO and RF channels before mixer are also discussed in detail. This article recommends RF power level has to be within or just beyond P1dB of the mixer. LO drive must be within average drive level to get best I and Q waveforms. These corrections in power level have helped to reduce the final phase nonlinearity drastically. Thus, it is concluded that the implemented techniques for phase nonlinearity reduction are successful.
Acknowledgments
The authors gratefully thank Mr. Suresh Kumar, K.V. Head, PDIC, and Mr. Manoj Jain, Director, Research and Development, Bharat Electronics (BEL), for inspiring to publish this work. The authors are also thankful to Microwave Super Component, BEL, for facilitating assembly and testing-related support. They also thank all others who were involved directly or indirectly in this work. This is the work of Indian government, not subject to copyright. The authors are with the Product Development and Innovation Center, Microwave Super-components and Center of Excellence, Bharat Electronics Limited, Bengaluru.
Competing interests
The authors report no conflict of interests.
Mahadev Sarkar (M’22) member, IEEE, was born in Murshidabad, West Bengal, India. He received the B. Tech degree from the University of Kalyani, Kolkata, India. He is currently pursuing the M. Tech and Ph.D. (currently is in halt) degrees with the Birla Institute of Technology and Science (BITS) at Pilani, India. From 2005 to 2008, he was an RF Design Engineer with the Core RF Design Group, Astra Microwave Technologies (Unit-III), Hyderabad. From 2008 to 2011, he was a Design Engineer-I with the Filters and TMA design group of Powerwave Technologies Research and Development India Pvt. Ltd., Hyderabad. In February 2011, he joined the microwave and millimetre-wave components design group of Product Development and Innovation Centre, Bharat Electronics Limited, Bengaluru, India, where he is currently involved in broad and narrow band receiver design projects in the microwave and millimeter-wave component design group. He delivers talks at various academic institutions to Ph.D. scholars/M. Tech students on recent microwave design trends. He had also been selected to conduct viva voce for final-year M. Tech. students as an External Examiner at the National Institute of Technology (NIT) at Trichy, India, in 2016. He has received innovative contribution awards for Command Control and Guidance Unit (CGU) and Digital Instantaneous Frequency Measurement Receiver (DIFM) in the years 2018–19 and 2019–20, respectively. He holds a patent in his own credit. He is the recipient of research and development award for the excellent technology development of Passive Homing Head (PHH) of New Generation Anti-Radiation Guided Missile Program in the year 2019–20. He has also received the best paper award by IEEE Chennai Chapter in the year 2018–19. He reviews articles for various reputed international journals, conferences, and symposiums. He has authored or coauthored several research articles in national and international journals, conferences, and symposiums. His current research interests include microwave, millimeter-wave, and sub-mm-wave broadband and narrowband passive and semi-active component, highly sensitive RF receivers, and critical microwave components design.
Raghu B. R. received his B.E. degree in electronics and communication engineering from RV College of Engineering, Visvesvaraya Technological University, Belagavi, Karnataka, India. He joined Bharat Electronics, Bangalore, India, in January 2014 and started his career in Broadband Receiver Development projects in Microwave Super Components BEL, India. He has been working as project engineer for various projects of microelectronics assembly and testing. He is the recipient of research and development award. He has authored or coauthored several technical papers in national and international journals, conferences, and symposiums.
R. Sivakumar received his degree in electronics and communication engineering in India. He joined Bharat Electronics Limited (BEL), Bengaluru, India, in 2001, where he was involved in design and development of very high-frequency (VHF) and ultrahigh-frequency (UHF) radio modules, synthesizers for SAT-com RT, and mobile jammers. In 2008, he joined Sony Ericsson Mobile Communication, Chennai, India, as Senior RF design Engineer. In 2010, he was a Technical Lead with Honeywell Technologies, Bengaluru. He is currently with the Product Development and Innovation Center, BEL, Bengaluru, where he is involved in the design and development of wideband receivers, modules, and subsystems for radar and electronic warfare (EW) systems and super components. He has authored/coauthored several publications in national and international conferences, journals, and symposiums. His current research interests include efficient phase-locked loop (PLL) design.