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Understanding adhesion failure in low-k dielectric stack during Chemical-Mechanical Polishing

Published online by Cambridge University Press:  01 February 2011

F. Iacopi ,
D. Degryse ,
I. Vos ,
M. Patz  and
K. Maex
F. Iacopi
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium E.E. Dept., Katholieke Universiteit Leuven, Belgium
D. Degryse
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium Mech. Eng. Dept., Universiteit Gent, Belgium
I. Vos
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
M. Patz
Affiliation:
JSR Corporation, Tsukuba, Japan
K. Maex
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium E.E. Dept., Katholieke Universiteit Leuven, Belgium
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Abstract

Low-k dielectrics are currently starting to replace SiO2 in advanced on-chip interconnects. Being low surface energy materials, a major concern for the integration of such dielectrics in Cu damascene processes is given by adhesion failure at the interfaces of the low-k films with cap or liner layers during Chemical Mechanical Polishing (CMP). A cross-comparison between interface fracture energies as measured through four-point bending, CMP experiments and stress fields computed by Finite Element Modeling, shows that it is not possible to predict failures by setting a ‘universal’ threshold on adhesion strength.

In particular, we report on the critical role of CMP –induced shear stress on the onset of interface debonding, and the way the shear load is transmitted to the critical interfaces. The top-down load transmission depends on the position of the weak interfaces, and on the way the intermediate films in the stack can confine such load through their thickness and mechanical (elastic and plastic) properties.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 795: Symposium U – Thin Films - Stresses and Mechanical Properties X , 2003 , U4.3
Copyright
Copyright © Materials Research Society 2004

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References

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