Precursor design and engineering for low-temperature deposition of gate dielectrics for thin film transistors

Abstract

The electrical and physical quality of gate and passivation dielectrics significantly impacts the device performance of thin film transistors (TFTs). The passivation dielectric also needs to act as a barrier to protect the TFT device. As low temperature TFT processing becomes a requirement for novel applications and plastic substrates, there is a need for materials innovation that enables high quality plasma enhanced chemical vapor deposition (PECVD) gate dielectric deposition. In this context, this paper discusses structure-property relationships and strategies for precursor development in silicon nitride, silicon oxycarbide (SiOC) and silicon oxide films. Experiments with passivation SiOC films demonstrate the benefit of a superior precursor (LkB-500) and standard process optimization to enable lower temperature depositions. For gate SiO₂ deposition (that are used with polysilicon TFTs for example), organosilicon precursors containing different types and amounts of Si, C, O and H bonding were experimentally compared to the industry standard TEOS (tetraethoxysilane) at different process conditions and temperatures. Major differences were identified in film quality especially wet etch rate or WER (correlating to film density) and dielectric constant (k) values (correlating to moisture absorption). Gate quality SiO₂ films can be deposited by choosing precursors that can minimize residual Si-OH groups and enable higher density stable moisture-free films. For e.g., the optimized precursor AP-LTO^® 770 is clearly better than TEOS for low temperature PECVD depositions based on density, WER, k charge density (measured by flatband voltage or V_fb); and leakage and breakdown voltage (V_bd) measurements. The design and development of such novel precursors is a key factor to successfully enable manufacturing of advanced low temperature processed devices.