Hostname: page-component-745bb68f8f-5r2nc Total loading time: 0 Render date: 2025-01-12T09:29:17.945Z Has data issue: false hasContentIssue false
  • English
  • Français

Potential Applications of Poly-Silicon as an Electronic-Device Material

Published online by Cambridge University Press:  15 February 2011

Dirk J. Bartelink
Dirk J. Bartelink*
Affiliation:
Stanford University, Stanford, California and Xerox Palo Alto Research Centers, 3333 Coyote Hill Rd., Palo Alto, CaliforniaUSA
Get access

Abstract

Poly-crystalline silicon can be regarded as a true electronic material if good p-n junctions can be made in it or if its state of depletion can be altered by reasonable gate voltages. The degree of perfection with which it must exhibit these electronic-material properties depends on whether the application is as a technology in VLSI (or other bulk-Si substrate use) where devices with bulk-crystalline properties are available or as the principal active material in Large Area Integration (LAI), such as flat-panel display addressing circuits, where the competition is much less demanding. The three main detrimental effects of grain boundaries on electronic-device function are the action of grain boundary traps as (1) extra charge centers, (2) lifetime killers, and (3) mobility-reducing scattering centers. The current trend in reducing or almost eliminating grain boundaries by laser recrystallization or lateral epitaxy has the effect of reducing the average number of traps. In terms of potential applications of the material, the improvement derived from these procedures must be balanced against other contraints placed on the overall structure. For example, the thickness and quality of the lower oxide (and interface) in these processes will determine whether an electronically active lower gate function is practical. Some currently envisioned applications include load devices in inverters either as resistors or as depletion transistors, common-gate staked CMOS structures, dual-channel MOSFET's, and other “vertical VLSI” applications. The systems-level topological advantages of stacked structures and the circuit-performance improvement provided by the ground plane in dielectrically isolated devices must also be balanced against the extra cost and yield loss of additional masking level complexity and design complication.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 5: Symposium B – Grain Boundaries in Semiconductors , 1981 , 249
Copyright
Copyright © Materials Research Society 1982

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Hofstein, S. R., IEEE Trans. Electron Dev., ED–13 846 (1966).CrossRefGoogle Scholar
2. Mandurah, M. M., Saraswat, K. C. and Kamins, T. I., IEEE Trans. Electron Dev., ED–28, 1163 (1981).CrossRefGoogle Scholar
3. Spear, W. E., Advances in Physics, 26, 811 (1977).Google Scholar
4. Seto, J. W., J. AppL Phys., 46, 5247 (1975).Google Scholar
5. Lu, N. C-C., Gerzberg, L., Lu, C-Y. and Meindl, J. D., IEEE Trans. Electron Dev., ED–28, 818 (1981).Google Scholar
6. Kamins, T. I., Solid-State Electron., 15, 789 (1972).Google Scholar
7. Depp, S. W., Juliana, A. and Huth, B. G., Int. Electron Devices Meeting Tech Dig, 703 (1980).Google Scholar
8. Johnson, N. M., Biegelsen, D. K. and Moyer, M. D., Appl. Phys. Lett., 38, 900 (1981).CrossRefGoogle Scholar
9. Lam, H-W., Sobczak, Z. B., Pinizzotto, R. F. and Tasch, A. F. Jr., Int. Electron Devices Meeting Tech Dig., 559 (1980).Google Scholar
10. Kamins, T. I., private communication.Google Scholar
11. Biegelsen, D. K., Johnson, N. M., Bartelink, D. J. and Moyer, M. D., Appl. Phys. Lett., 38, 150 (1981).CrossRefGoogle Scholar
12. Huff, H. R., Halverson, R. D., Chiu, T. L. and Guterman, D., J. Elect. Chem Soc., 127, 2482 (1980).Google Scholar
13. Yaron, G., Hess, L. D. and Kokorowski, S. A., IEEE Trans. Electron Dev., ED–27, 964 (1980).Google Scholar
14. Solomon, P., J. Appl Phys., 48, 3843 (1977);Google Scholar
14a DiMaria, D. J., J. Appl. Phys., 50, 5826 (1979).CrossRefGoogle Scholar
15. Rodeen, H. D., Brors, D. L. and Eggermont, G. E. J., in “Laser and Electron-Beam interactions with Solids,” Appleton, B. R. and Celler, G. K., Eds. New York, North Holland, 1982.Google Scholar
16. Lee, K. F., Gibbons, J. F., Saraswat, K. C. and Kamins, T. I., Appl. Phys. Lett., 35, 173 (1979).Google Scholar
17. Gibbons, J. F., “Laser and Electron-Beam Solid Interaction and Materials Processing ,” Gibbons, J. F., Hess, L. D. and Sigmon, T. W., Eds. New York, North Holland, 449 (1981).Google Scholar
18. Maby, E. W., Geis, M. W., LeCoz, Y. L., Silversmith, D. J., Mountain, R. W. and Antoniadis, D. A., EDL–2, 241 (1981).Google Scholar
19. Fan, J. C. C., Geis, M. W. and Tsaur, B. Y., Appl. Phys. Lett., 38, 365 (1981).Google Scholar
20. Kamins, T. I. and Pianetta, P. A., Elect. Dev. Lett., EDL–1, 214 (1980).CrossRefGoogle Scholar
21. Tasch, A. F. Jr. Holloway, T. C., Lee, K. F., Gibbons, J. F. and Kamins, T. I., Electron. Lett, 15, 435 (1979).Google Scholar
22. Gibbons, J. F. and Lee, K. F., Elect. Dev. Lett., EDL–1, 117 (1980).Google Scholar