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A New Thin Film Transistor Structure for Increasing Storage Capacitance in the Pixel Element

Published online by Cambridge University Press:  01 January 1993

B.H. Min ,
H.S. Choi ,
J.S. Park  and
M.K. Han
B.H. Min
Affiliation:
Department of Electrical Engineering, Seoul National University,San 56-1, Shinrim-dong, Kwanak-ku, Seoul 151-742, Korea
H.S. Choi
Affiliation:
Department of Electrical Engineering, Seoul National University,San 56-1, Shinrim-dong, Kwanak-ku, Seoul 151-742, Korea
J.S. Park
Affiliation:
Department of Electrical Engineering, Seoul National University,San 56-1, Shinrim-dong, Kwanak-ku, Seoul 151-742, Korea
M.K. Han
Affiliation:
Department of Electrical Engineering, Seoul National University,San 56-1, Shinrim-dong, Kwanak-ku, Seoul 151-742, Korea
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Abstract

In a high resolution TFT LCD, the ratio of a parasitic capacitance between a gate and a source electrode to the liquid crystal capacitance increase. Increase of the Cgs/Clc makes the voltage shift of the pixel electrode large. This also results in degradation of the display quality such as image sticking or flicker. The voltage shift can be decreased by increasing the value of a storage capacitor, however, it decreases the aperture ratio.

We present a new thin film transistor structure to increase the storage capacitance without reducing the aperture ratio. In the simulation results, we have observed that the pixel voltage shift is remarkably reduced compared with the conventional one.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 297: Symposium A – Amorphous Silicon Technology - 1993 , 1993 , 877
Copyright
Copyright © Materials Research Society 1993

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References

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