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Manufacturing of TFTs with High Deposition Rated Microcrystalline Silicon using Plasma Enhanced Chemical Vapor Deposition

Published online by Cambridge University Press:  01 February 2011

Kyung-Bae Park
Affiliation:
[email protected], R & D reseracher, Display Lab, Samsung advanced Institute of technology Mt.14-1 Nongseo-Dong GiHeung-Gu YongIn-Si GyungGi-Do, YongIn-Si, 446-712, Korea, Republic of
Ji-Sim Jung
Affiliation:
[email protected], Samsung Advanced Institute of Technology, Display Lab, Mt14-1, Nongseo-dong, Giheung-Gu, Gyeonggi-Do, Yongin-Si, 446-712, Korea, Republic of
Jong-Man Kim
Affiliation:
[email protected], Samsung Advanced Institute of Technology, Display Lab, Mt14-1, Nongseo-dong, Giheung-Gu, Gyeonggi-Do, Yongin-Si, 446-712, Korea, Republic of
Myung-kwan Ryu
Affiliation:
[email protected], Samsung Advanced Institute of Technology, Display Lab, Mt14-1, Nongseo-dong, Giheung-Gu, Gyeonggi-Do, Yongin-Si, 446-712, Korea, Republic of
Sang-Yoon Lee
Affiliation:
[email protected], Samsung Advanced Institute of Technology, Display Lab, Mt14-1, Nongseo-dong, Giheung-Gu, Gyeonggi-Do, Yongin-Si, 446-712, Korea, Republic of
Jang-Yeon Kwon
Affiliation:
[email protected], Samsung Advanced Institute of Technology, Display Lab, Mt14-1, Nongseo-dong, Giheung-Gu, Gyeonggi-Do, Yongin-Si, 446-712, Korea, Republic of
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Abstract

Microcrystalline silicon was deposited on glass by standard plasma enhanced chemical vapor deposition using H2 diluted SiH4. Raman spectroscopy indicated a crystalline volume fraction of as high as 40% in films deposited at a substrate temperature 350oC. The deposition rate in films was as high as 10Å/sec. This process produced ¥ìc-Si TFTs with both an electron mobility of 10.9cm2/Vs, a threshold voltage of 1.2V, a subthreshold slop of 0.5V/dec at n-channel TFTs and a hole mobility of 3.2cm2/Vs, a threshold voltage of -5V, a subthreshold slop of 0.42V/dec at p-channel TFTs without post-fabrication annealing.

Type
Research Article
Copyright
Copyright © Materials Research Society 2007

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