Investigation of Dislocation Behavior during Bulk Crystal Growth of SiC

Abstract

It is well-known that SiC crystal deficiencies are delaying the realization of outstandingly superior SiC power electronics. Efforts to date have centered on eradicating micropipes, and 4H-SiC substrates with extremely low micropipe densities have been achieved. Nevertheless, SiC substrates and epilayers still contain several types of dislocations in densities on the order of thousands per square centimetres, which are nearly 100-fold micropipe densities. While not nearly as detrimental to SiC device performance as micropipes, it has recently been demonstrated that dislocations existing in SiC crystals degrade several characteristics of SiC devices, e.g., the forward bias characteristics of SiC pin diodes and the gate oxide reliability of SiC MOSFETs.

This paper reports several dislocation processes occurring during the growth of hexagonal SiC bulk crystals. Particularly, we focus on the dislocation formation and propagation processes in SiC crystals. We have investigated dislocation processes in 4H-SiC bulk crystals grown by the physical vapor transport (PVT) growth method, using defect selective etching and transmission electron microscopy (TEM).

It was found that foreign polytype inclusions introduced a high density of dislocations at the polytype boundary. In the polytype-transformed areas of the crystal, very few medium size hexagonal etch pits due to threading screw dislocations were observed, indicating that the polytype transformation ceased the propagation of threading screw dislocations. The oval-shaped etch pit arrays observed on the etched vicinal (0001)Si surface, indicative of the dislocation multiplication in the basal plane, showed characteristic distribution around micropipes and low angle grain boundaries. Based on the results, we will argue the dislocation behavior in PVT grown SiC crystals, suggesting that dislocation interaction and conversion are relevant processes to understanding the behavior.