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A GaAs Sagfet Process Using TiSi2 and Rapid Thermal Annealing

Published online by Cambridge University Press:  26 February 2011

D. Wood  and
J. Mun
D. Wood
Affiliation:
Standard Telecommunication Laboratories Limited, London Road, Harlow, Essex, England, CM17 9NA
J. Mun
Affiliation:
Standard Telecommunication Laboratories Limited, London Road, Harlow, Essex, England, CM17 9NA
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Abstract

For the first time a combination of titanium disilicide and rapid thermal processing has been used to produce a high temperature stable gate on gallium arsenide. A barrier height of 0.79 V with an ideality factor of 1.02 has been obtained after annealing up to 800°C, and useful results are found up to 900°C. Auger analysis shows little intermixing of the silicide with the underlying substrate, which is not the case for conventional annealing. The advantages of titanium disilicide over the more commonly used tungsten silicide with regard to film resistivity and stress will be discussed. A self-aligned gate MESFET (SAGFET) process has been developed using TiSi2 as the gate material.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 52: Symposium B – Rapid Thermal Processing , 1985 , 409
Copyright
Copyright © Materials Research Society 1986

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