Electrophoretic Deposition of Carbon Nanotubes for Interconnections in Microelectronics

Abstract

Carbon nanotubes (CNTs) have been considered as a promising interconnect material to replace the solder bump used in the flip chip package because of their special electrical, mechanical and thermal properties, which may promote both the performance and reliability of the flip chip packaging. In this paper, electrophoretic deposition (EPD) of CNTs on substrates has been demonstrated for the interconnect application. EPD is a simple, low cost and high throughput process that is capable to produce densely packed film with good homogeneity at low temperature. By altering the electric fields and deposition time during the EPD process, the thickness of the CNTs film could be controlled. In this study, multi-walled carbon nanotubes (MWCNTs) were successfully coated on the various substrates using the EPD method. A highly uniform CNTs microstructure film with thickness over 5 µm was achieved. In addition, the selective depositions of CNTs on the pre-defined bond pads to form CNTs bumps were also accomplished. By employing typical flip-chip bonding technique, high density CNTs bumps were aligned to form a test chip/host substrate interconnects. The electrical conductivity of the CNTs interconnects was carried out using four-point probe measurement. Reliable electrical contacts with linear relationship in the current-voltage (I-V) characteristic suggesting ohmic behaviour were attained. The overall resistances extracted were also relatively low. These superior electrical properties have demonstrated that the CNTs bumps deposited using EPD method is a viable way to serve as an alternative to current metal solder interconnects material such as Sn-Pb alloys. Hence, it offers a promising interconnect application in the quest for device miniaturization in microelectronic industry.