Electrical Characteristics of Ultra-Thin Multi-Layers of Poly-Si and Silicon Dioxide

Abstract

Rough-surface polycrystalline silicon films have been used for fabrication of electrically erasable-programmable read-only-memories (EEPROM). Silicon-Rich Oxides (SRO), also known as semi-insulating polycrystalline silicon (SIPOS), have been recommended for use as electron injectors. The advantage of SRO as injectors is that both the bottom and top surfaces of the film can be used to obtain high field enhancement. An ultra-thin multi-layer structure of silicon and silicon dioxide has been fabricated by low pressure chemical vapor deposition (LPCVD). High resolution TEM shows alternating layers of 50 A thick SiO₂ and polycrystalline Si (grain size ∼ 80 A) films were deposited and MOS capacitors using this multilayer dielectric were studied to understand their electrical characteristics. Both I-V and C-V measurements show that the Fowler-Nordheim tunneling current is proportional to the number of polycrystalline layers. The “turn-on” voltage of the tunneling current is determined by the thickness of first SiO₂ layer, and the effective dielectric constant varies from 3.9 to 9.1, proportional to the number of poly-Si layers within the multi-layer structure (MLS). For a 350 Å stack (7 layers), the interface trap density, D_it, was 3×10¹⁰ traps/cm², and the effective dielectric constant was roughly 9.