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The Effects of Test Condition, Microstructure and Linewidth on Electromigration Void Morphology

Published online by Cambridge University Press:  15 February 2011

S. Bauguess
Affiliation:
Motorola, Semiconductor Products Sector 2200 W. Broadway Road, Mesa AZ 85257 M/S M350
M. L. Dreyer
Affiliation:
Motorola, Semiconductor Products Sector 2200 W. Broadway Road, Mesa AZ 85257 M/S M350
M. Tucker
Affiliation:
Motorola, Semiconductor Products Sector 2200 W. Broadway Road, Mesa AZ 85257 M/S M350
D. Theodore
Affiliation:
Motorola, Semiconductor Products Sector 2200 W. Broadway Road, Mesa AZ 85257 M/S M350
C. T. Lee
Affiliation:
Motorola, Semiconductor Products Sector 2200 W. Broadway Road, Mesa AZ 85257 M/S M350
S. Edwards
Affiliation:
Motorola, Semiconductor Products Sector 2200 W. Broadway Road, Mesa AZ 85257 M/S M350
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Abstract

In this paper, experimental results for electromigration void morphology and failure time distribution are presented as a function of test condition, grain size distribution and conductor linewidth. Unpassivated Al-Cu(1.5%)-Si(1.5%) conductors with linewidths in the range lum ≤W ≤l0μm were subjected to accelerated temperature stresses of T=150° C and 250°C and current stresses in the range j= 0.5-4X106 A-cm-2, for each temperature stress. Unlike previous reports, erosion-like voids dominated at all current densities and temperatures for both W/D50≤1 and W/D50 > 1. The void distribution within a line was strongly dependent on test conditions and linewidth. The critical current density was extracted from electromigration lifetimes measured as a function of current density. The results show that the linewidth dependence of electromigration lifetimes depend strongly on the Blech relation.

Type
Research Article
Copyright
Copyright © Materials Research Society 1995

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