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Direct Growth of III-V Devices on Silicon

Published online by Cambridge University Press:  01 February 2011

Katherine Herrick
Affiliation:
[email protected], Raytheon Tewksbury, Advanced Technology, Tewksbury, MA, 01876, United States
Thomas Kazior
Affiliation:
[email protected], Raytheon RF Components, Advanced Technology, Andover, MA, 01810, United States
Amy Liu
Affiliation:
[email protected], IQE Inc., Bethlehem, PA, 08873, United States
Dmitri I. Loubychev
Affiliation:
[email protected], IQE Inc., Bethlehem, PA, 08873, United States
Joel M. Fastenau
Affiliation:
[email protected], IQE Inc., Bethlehem, PA, 08873, United States
Miguel Urteaga
Affiliation:
[email protected], Teledyne Scientific Company, Thousand Oaks, CA, 91360, United States
Eugene A. Fitzgerald
Affiliation:
[email protected], Massachusetts Institute of Technology, Department of Materials Science and Engineering, Cambridge, MA, 02139, United States
Mayank T. Bulsara
Affiliation:
[email protected], Massachusetts Institute of Technology, Department of Materials Science and Engineering, Cambridge, MA, 02139, United States
David Clark
Affiliation:
[email protected], Raytheon Systems Limited, Glenrothes, Scotland, N/A, United Kingdom
Berinder Brar
Affiliation:
[email protected], Teledyne Scientific Company, Thousand Oaks, CA, 91360, United States
Wonill Ha
Affiliation:
[email protected], Teledyne Scientific Company, Thousand Oaks, CA, 91360, United States
Joshua Bergman
Affiliation:
[email protected], Teledyne Scientific Company, Thousand Oaks, CA, 91360, United States
Nicolas Daval
Affiliation:
[email protected], SOITEC, Bernin, N/A, France
Jeffrey LaRoche
Affiliation:
[email protected], Raytheon RF Components, Advanced Technology, Andover, MA, 01810, United States
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Abstract

Our direct growth approach of integrating compound semiconductors (CS) and silicon CMOS is based on a unique silicon template wafer with an embedded CS template layer of Germanium (Ge). It enables selective placement of CS devices in arbitrary locations on a Silicon CMOS wafer for simple, high yield, monolithic integration and optimal circuit performance. HBTs demonstrate a peak current gain cutoff frequency ft of 170GHz at a nominal collector current density of 2mA/μm2. To the best of our knowledge this represents the first demonstration of an InP-based HBT fabricated on a silicon wafer.

Type
Research Article
Copyright
Copyright © Materials Research Society 2008

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References

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