Dependence of Stress-Related Reliability of Metallic Power Line on Physical Properties of Its Overlayer, Chip Location and Package Structure in Memory Devices

Abstract

This work shows that shear failure in the metallic power line on the IC chip, which mainly takes place after plastic packaging, is always followed by mechanical damage in its overlayer. Thus, the topological feature of the metallic overlayer is important in defining shear damage in the metal line. On the other hand, since open failure in the metal line associated with stress migration is caused by tensile stress resulting from thermal mismatch with its overlayer, the physical properties of the overlayer plays an important role in determining open failure in the metal line. The FEM simulation shows how the tensile stress distribution along a metal line varies with the physical properties of its overlayer. The metallic overlayer with an initial coating of a ductile oxide layer was estimated to be a very effective way of minimizing tensile stress induced to the metal line. On the other side, shear damage of the metal line was found to be highly sensitive to the chip location or the package structure. The numerical calculation also indicates that shear stress applied to the passivated metal line, which reveals a maximum value at the chip comer, can be considerably reduced by chip premolding overcoating with ductile photosensitive polyimide.