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Contact Resistance Study of Pt, Ni and Au on La0.7Sr0.3MnO3 (LSMO)/Si for Heterojunction Device Applications

Published online by Cambridge University Press:  05 August 2013

Rajashree Nori
Affiliation:
Center of Excellence in Nanoelectronics, Indian Institute of Technology-Bombay, Mumbai 400076, India
Pankaj Kumbhare
Affiliation:
Center of Excellence in Nanoelectronics, Indian Institute of Technology-Bombay, Mumbai 400076, India
Prashanth Paramahans
Affiliation:
Center of Excellence in Nanoelectronics, Indian Institute of Technology-Bombay, Mumbai 400076, India
S. N. Kale
Affiliation:
Department of Applied Physics, Defence Institute of Advanced Technology, Pune 411025, India
R. Pinto
Affiliation:
Center of Excellence in Nanoelectronics, Indian Institute of Technology-Bombay, Mumbai 400076, India
V. Ramgopal Rao
Affiliation:
Center of Excellence in Nanoelectronics, Indian Institute of Technology-Bombay, Mumbai 400076, India
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Abstract

Achieving low resistance ohmic contacts for heavily doped devices is critical towards ensuring that contact resistance does not dominate the device performance. Here, we report contact resistance studies done on Pt/LSMO, Ni/LSMO and Au/LSMO metal-semiconductor interfaces. Phase-pure LSMO thin films deposited on n+ Si substrates were lithographically patterned and metallized to produce circular transfer length method (CTLM) based specific contact resistivity (ρc) and transfer length (LT) evaluation structures. Based on the electrical performance, interfacial reactivity and mechanical stability of the three metal junctions, the lowest ρc and LT metal for LSMO films on Si is identified for device applications.

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Articles
Copyright
Copyright © Materials Research Society 2013 

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References

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