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Low Temperature Copper Deposition by PE-ALD

Published online by Cambridge University Press:  31 January 2011

Jiajun Mao ,
Eric Eisenbraun ,
Vincent Omarjee ,
Clement Lanslot  and
Christian Dussarrat
Jiajun Mao
Affiliation:
[email protected], University at Albany, College of Nanoscale Science and Engineering, Albany, New York, United States
Eric Eisenbraun
Affiliation:
[email protected], University at Albany, College of Nanoscale Science and Engineering, Albany, New York, United States
Vincent Omarjee
Affiliation:
[email protected]
Clement Lanslot
Affiliation:
[email protected], American Air Liquide, Newark, Delaware, United States
Christian Dussarrat
Affiliation:
[email protected], American Air Liquide, Newark, Delaware, United States
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Abstract

With the continuing scaling in device sizes, sputtered copper is not expected to achieve the conformality and surface coverage requirements to be an effective seed layer for electrochemical deposition in sub-32nm features. Additionally, the metallization demands of high aspect ratio TSVs in 3D-architectures pose similar challenges. In this work, a manufacturable low temperature Cu PE-ALD process has been developed employing a novel O and F-free precursor. The ALD process conditions are correlated with key film properties, including deposition rate, composition, step coverage, and resistivity. Additionally, the influence of precursor substituents on the deposition rate and preliminary integration performance are discussed.

Keywords

atomic layer depositionCuplasma deposition
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 1195: Symposium B – Rellliability and Materials Issues of Semiconductor Optical and Electrical Devices and Materials , 2009 , 1195-B12-05
Copyright
Copyright © Materials Research Society 2010

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References

1. The International Technology Roadmap for Semiconductors, Semiconductor Industry Association (2007), http://pulic.itrs.netGoogle Scholar
2. Helmersson, U., Lattemann, M., Bohlmark, J., Ehiasarian, A., and Tudmundsson, J. T., Thin Solid Films, 513, 1 (2006)10.1016/j.tsf.2006.03.033Google Scholar
3. Leskelä, M., and Ritala, M., Angew. Chem. Int. Ed., 42, 5548 (2003)10.1002/anie.200301652Google Scholar
4. Cohen, U., Solid State Technology, 49, 53 (2006)Google Scholar
5. Li, Z., Rahtu, A., and Gordon, R.G., J. Electrochem. Soc., 153, 787 (2006)10.1149/1.2338632Google Scholar
6. Kim, H., J. Vac. Sci. Technol. B, 21, 2231 (2003)10.1116/1.1622676Google Scholar
7. Wu, L., and Eisenbraun, E., J. Vac. Sci. Technol. B, 25, 2581 (2007)10.1116/1.2779050Google Scholar