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Localized Charge Trapping Memory Cells in a 63 nm Generation with Nanoscale Epitaxial Cobalt Salicide Buried Bitlines

Published online by Cambridge University Press:  01 February 2011

Torsten Mueller ,
C. Kleint ,
C. Fitz ,
M. Isler ,
S. Riedel ,
J.-U. Sachse ,
D. Olligs ,
H. Boubekeur ,
F. Heinrichsdorf  and
V. Polei
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Torsten Mueller
Affiliation:
[email protected], Qimonda Dresden GmbH & Co. OHG, Flash Technology Development, Koenigsbruecker Strasse 180, Dresden, 01099, Germany, +49 351 886 7913, +49 351 886 6996
C. Kleint
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
C. Fitz
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
M. Isler
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
S. Riedel
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
J.-U. Sachse
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
D. Olligs
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
H. Boubekeur
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
F. Heinrichsdorf
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
V. Polei
Affiliation:
[email protected], Infineon Technologies, Dresden, 01099, Germany
D. Pritchard
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
M. Verhoeven
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
L. Lattard
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
M. Markert
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
C. Schupke
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden, 01099, Germany
B. Tippelt
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden 01099, Germany
S. Teichert
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden 01099, Germany
R. Reisdorf
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden 01099, Germany
C. Ludwig
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden 01099, Germany
E.G. Stein v. Kamienski
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden 01099, Germany
T. Mikolajick
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden 01099, Germany
N. Nagel
Affiliation:
[email protected], Qimonda, Koenigsbruecker Strasse 180, Dresden 01099, Germany
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Abstract

A 63nm Twin Flash memory cell with a size of 0.0225μm2 per 2 (or 4) bits is presented. To achieve small cell areas, a buried bit line and an aggressive gate length of 100 nm are the key features of this cell together with a minimum thermal budget processing. A novel epitaxial CoSi2 process allows the salicidation of local buried bitlines with only a few tens of nanometer width.

Keywords

memorydevicesepitaxy
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 997: Symposium I – Materials and Processes for Nonvolatile Memories II , 2007 , 0997-I02-10
Copyright
Copyright © Materials Research Society 2007

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References

1. Eitan, B. et al., IEEE Elect. Dev. Lett. 21, 543 (2000).Google Scholar
2. Nagel, N. et al., Int. Symp. on VLSI Tech., Syst., and Appl. (TSA), accept. for publ. (2007).Google Scholar
3. Nagel, N. et al., VLSI Tech. Symp., Kyoto 7B–3 (2005).Google Scholar
4. Kittl, J. A. et al., Appl. Phys. Lett. 67, (1995), 2308.Google Scholar
5. Tung, R. T., Appl. Phys. Lett., 72 (1998) 2538.Google Scholar
6. Xiao, Z. G. et al., MRS Soc. Proc. 202 (1991) 101.Google Scholar
7. Dass, M. L. A. et al., Appl. Phys. Lett. 58, (1991), 1308.Google Scholar
8. Sun, J. J. et al., IEEE Trans. Elect. Dev. 45 (1998) 1946.Google Scholar
9. Perniola, L. et al., IEEE Int. Elect. Dev. Meet. 2005.Google Scholar
10. Hagenbeck, R. et al., IEEE Int. Conf. on Sim. of Semicond. Proc. and Dev. 2006.Google Scholar