Hostname: page-component-78c5997874-xbtfd Total loading time: 0 Render date: 2024-11-17T03:23:36.198Z Has data issue: false hasContentIssue false
  • English
  • Français

Integration of a Polymer Etch Stop Layer in a Porous Low K MLM Structure

Published online by Cambridge University Press:  01 February 2011

Gregory C. Smith ,
Neil Henis ,
Richard McGowan ,
Brian White ,
Matthias Kraatz ,
Sri Satyanarayana ,
Sharath Hosali ,
Youfan Liu  and
Klaus Pfeifer
Gregory C. Smith
Affiliation:
SEMATECH, Austin Texas
Neil Henis
Affiliation:
SEMATECH, Austin Texas
Richard McGowan
Affiliation:
SEMATECH, Austin Texas
Brian White
Affiliation:
Advanced Micro Devices Assignee at SEMATECH, Austin Texas
Matthias Kraatz
Affiliation:
SEMATECH, Austin Texas University of Texas, Austin, Texas
Sri Satyanarayana
Affiliation:
SEMATECH, Austin Texas
Sharath Hosali
Affiliation:
SEMATECH, Austin Texas
Youfan Liu
Affiliation:
Intel Assignee at SEMATECH, Austin, Texas
Klaus Pfeifer
Affiliation:
SEMATECH, Austin Texas
Get access

Abstract

Two level metal structures were fabricated to test the efficacy of using an organic low K etch stop layer (OESL) in order to lower the effective dielectric constant for intralayer capacitance. The organic etch stop layer's intrinsic capacitance of 3.3 compares with that of silicon carbide (∼ 5) which constitutes the control of the experiment. This reduction represents a reduction of effective dielectric constant for the stack of about 10% to about 3.0. The process was optimized so as to achieve yield of via chains of a million 130 nm diameter vias, and effective K was measured. The target of 3.0 was achieved using this process. Interpenetration of the organic etch stop with the MSQ porous low K material was observed.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 863: Symposium B – Materials, Technology and Reliability of Advanced Interconnects , 2005 , B2.11
Copyright
Copyright © Materials Research Society 2005

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Furukawa, Y., Kokubo, T., Struyf, H., Maenhoudt, M., Vanhaelemeersh, S., Gravesteijn, D., “Dual Damascene Patterning for Full Spin-on Stack of Porous Low-K Material”, (Proc. IEEE 2002 IITC), pp.45–47.Google Scholar
2. McGowan, R., Wang, D., Wolf, P. J., “Integration of an Ultra Low-K Dielectric an a 300 mm 130 nm Trench First Dual Damascene Etch Process”, AVS 51st International Symposium, November, 2004.Google Scholar