Hostname: page-component-586b7cd67f-dlnhk Total loading time: 0 Render date: 2024-12-01T03:28:33.117Z Has data issue: false hasContentIssue false

The Effect of Plasma Damage on the Material Composition and Electrical Performance of Different Generations of SiOC(H) Low k Films

Published online by Cambridge University Press:  01 February 2011

Aurelie Humbert
Affiliation:
[email protected], Philips Research Europe, CMOS integration, Kapeldreef 75, LEUVEN, N/A, 3001, Belgium, +32 16 28 84 14
Didem Ernur Badaroglu
Affiliation:
[email protected], Philips Research Europe, Kapeldreef 75, LEUVEN, N/A, B-3001, Belgium
Romano J.O.M Hoofman
Affiliation:
[email protected], Philips Research Europe, Kapeldreef 75, LEUVEN, N/A, B-3001, Belgium
Get access

Abstract

The degradation of SiOC(H) low-k films upon plasma treatments has been investigated. Three generations of SiOC(H) low-k dielectrics (k=3.0, k=2.6 and k=2.3) were used. The low-k materials have been exposed to N2O, NH3, O2, H2, He, Ar and N2 based plasmas, representing the most commonly-used plasmas during interconnect integration. For all plasma-treated samples, an increase in k-value and decrease in breakdown voltage was observed. These observations could be attributed to chemical degradation, in particular to carbon depletion and OH-bond formation. The latter leads to moisture adsorption, which was confirmed by contact angle measurements and FTIR spectra. The N2O plasma treatment was found to be the most aggressive for all low-k dielectrics studied. It drastically increases the k-value and the leakage current and results in complete carbon removal on the top-surface. This effect is most pronounced on the most porous material. On the other hand, an in-situ helium plasma shortly after low-k deposition enhances the resistance to chemical degradation upon exposure to other plasmas, even for the most aggressive ones. For the argon and reactive pre-clean plasmas, only small compositional changes were observed. In conclusion, it can be said that not only the plasma treatments have to be tuned in accordance with the low k integration requirements, but also attention has to be paid to limit moisture absorption during integration.

Type
Research Article
Copyright
Copyright © Materials Research Society 2006

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

[1] National Technology roadmap for Semiconductors, Semiconductor Industry Association (2005)Google Scholar
[2] Furukawa, Y., Wolters, R., Roosen, H., Snijders, J.H.M., Hoofman, R., Microelectronic Engineering 76 (2004) 2531 Google Scholar
[3] Shieh, J.M., Tsai, K.C., Dai, B.T., Wu, Y.C., Wu, Y.H., J.Vac.Sci Technolo. B 20(4), Jul/Aug 2002 p1476 Google Scholar
[4] Ichida, Y., Fukuda, T., Yanazawa, H., Surface and interface analysis (2004), 36: 677680.Google Scholar
[5] Humbert, A., Mage, L., Goldberg, C., Junker, K., Proenca, L., Lhuillier, J.B., proceedings MAM 2005.Google Scholar
[6] Michelon, J., Hoofman, R.J.O.M, IEEE IIRW proceedings 2005 Google Scholar