Published online by Cambridge University Press: 15 February 2011
Electrical and crystal properties of seeded lateral epitaxial Si are evaluated as a function of distance from seeding area with the aid of a micro-probe RHEED and MOSFET fabrication. the results indicate that the quality of a grown layer is as good as that of bulk Si Crystal for most of the epitaxial layer. However, at the SiO2 edge, electrial properties are somewhat poor due to the existence of dislocation and residual stress.Element devices useful for SO structures are fabricated. Electrical properties of MOSPET's with double active areas indicate that surface and bottomregions of the epitaxial layer are all of device worthy quality.Insulated control gate bipolar type transistors are proposed and some preliminary results are shown.