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Channel Cracking Technique for Toughness Measurement of Brittle Dielectric Thin Films on Silicon Substrates

Published online by Cambridge University Press:  10 February 2011

Qing Ma
Affiliation:
Intel Corporation, Santa Clara, CA 95052
Joseph Xie
Affiliation:
Intel Corporation, Santa Clara, CA 95052
Sam Chao
Affiliation:
Intel Corporation, Santa Clara, CA 95052
Safaa El-Mansy
Affiliation:
Intel Corporation, Santa Clara, CA 95052
Robert Mcfadden
Affiliation:
Intel Corporation, Santa Clara, CA 95052
Harry Fujimoto
Affiliation:
Intel Corporation, Santa Clara, CA 95052
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Abstract

A technique for the measurement of brittle thin film toughness has been developed. It is based on the mechanics of channel cracking in thin films. Dielectric films including CVD silicon oxide and silicon nitride films were studied using this technique. To prevent channel cracks from propagating into silicon substrates, an aluminum layer was deposited prior to the deposition of the dielectric layer. By using a specially made bending fixture, the cracks were observed in situ when the samples were subject to well controlled stresses. It was observed that for each film, a well defined critical film stress level existed, beyond which the crack velocity accelerated very rapidly. The critical film stresses were obtained by superposition of the critical applied stresses and the residual stresses in the films due to deposition and thermal expansion mismatch. It was shown that this technique was highly consistent in critical stress measurement. A simple shear-lag model was used to obtain the film toughness values using the measured critical film stress data.

Type
Research Article
Copyright
Copyright © Materials Research Society 1998

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References

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