Husam N. Alshareef
Guest Editor for this issue of MRS Bulletin
King Abdullah University of Science and Technology, Saudia Arabia; e-mail [email protected].
Alshareef is an associate professor of materials science and engineering at King Abdullah University of Science and Technology. He holds a PhD degree in materials science and engineering from North Carolina State University (NCSU). Following his graduation from NCSU in 1996, Alshareef worked as a postdoctoral fellow at Sandia National Laboratory. He then joined Micron Technology, where he worked on various aspects of semiconductor memory device fabrication. In 2001, he joined Texas Instruments where he worked on several projects in microelectronic process development and integration. His research interests are in the applications of functional oxides and electrical contact materials in emerging electronic and nanoelectronic devices, as well as in energy harvesting. Alshareef is the author of more than 145 articles, has 45 patents, and 80 international presentations. He is a senior member of the IEEE and is a member of the Materials Research Society. He has won numerous awards, including the Seth Sprague Physics Award, the U.S. Department of Education Electronic Materials Fellowship, and the Sematech Corporate Excellence Award.
Manuel Quevedo-Lopez
Guest Editor for this issue of MRS Bulletin
Department of Materials Science and Engineering at the University of Texas at Dallas; e-mail [email protected].
Quevedo-Lopez is an associate professor in the Department of Materials Science and Engineering at the University of Texas at Dallas. He received his PhD degree in materials science and engineering from the University of North Texas in 2002. Afterward, he joined Texas Instruments (TI) Silicon Technology Development Group as a Member of Technical Staff. While at Texas Instruments, Quevedo-Lopez was assigned to SEMATECH from 2004 to 2006. At TI and SEMATECH, he worked extensively in advanced gate stack materials for Si-based technology. In April 2007, he joined the University of Texas as Dallas as a research professor, and in September 2010, he was appointed as an associate professor of materials science and engineering. His research interests include dielectrics and contact materials for flexible electronics, large area sensors, and energy applications. Quevedo-Lopez has authored or co-authored more than 110 publications in peer-reviewed journals and proceedings and holds 10 U.S. patents. In addition, he is a member of the Materials Research Society and IEEE.
Prashant Majhi
Guest Editor for this issue of MRS Bulletin
SEMATECH, Austin, TX 78741, USA; e-mail [email protected].
Majhi is currently at SEMATECH (Intel Assignee) as the chief technologist managing the groups primarily researching scaled MOSFETs with high mobility channels in planar and non-planar forms and ultralow power technologies. He received his BTech degree from the Indian Institute of Technology, Madras (1996), and his PhD degree in science and engineering of materials from Arizona State University, Tempe, AZ (2000). He joined Philips Semiconductor in The Netherlands and worked on several CMOS and mixed-signal process technologies. In 2004, he joined Intel Corp. He has authored and co-authored more than 300 journal and conference papers in the various semiconductor research areas, including high-κ/metal gate process and devices, advanced junctions and contacts, high mobility channels (Group IV and III–V), non-planar devices, and steep-subthreshold tunneling-based field-effect transistors.
James J. Chambers
Texas Instruments, Texas, USA.
Chambers is a senior member of the technical staff and manager of front end process development in advanced CMOS at Texas Instruments. He obtained a PhD degree in chemical engineering from North Carolina State University in 2000. His research interests include advanced process and materials for integration in future energy-efficient nanoelectronic devices. Chambers’ research principles include understanding the surface physics and chemistry of semiconductors, dielectrics and metals, understanding the reactions at the interfaces between these materials, interfacial engineering to control these reactions, and device characterization to understand the effect of material properties on electrical properties. He has published more than 40 journal publications and proceedings, has been issued more than 40 U.S. patents, and has more than 40 conference presentations.
Brian Coss
University of Texas at Dallas, Richardson, TX 75080, USA; e-mail [email protected]
Coss is a PhD degree candidate in materials science and engineering at the University of Texas at Dallas. He has interned at SEMATECH from 2008 to 2010, while pursuing his PhD degree research on Schottky barrier height modulation using interface dipoles. His work has been presented at the Very Large Scale Integration (VLSI) Conference in 2009 and the 2010 International Electron Devices Meeting. His research focuses on contacts to semiconductors, in particular contacts to Si and other substrates for CMOS technology. Besides contacts, Coss also closely follows materials issues in graphene, high-κ dielectrics, solar technology, and quantum computation.
Jenny Hu
Stanford University, California 94305, USA; e-mail [email protected]
Hu is working toward her PhD degree in electrical engineering at Stanford University. She received her BS degree in electrical engineering from the University of California, San Diego, in La Jolla, CA, in 2005, and her MS degree in electrical engineering from Stanford in 2007. Her research interests include the design and fabrication of III–V semiconductor CMOS devices for digital logic applications. She was a recipient of the Stanford Graduate Fellowship and National Defense Science and Engineering Graduate Fellowship in 2005 and 2008 and the Intel PhD Fellowship in 2009.
Muhammad Mustafa Hussain
King Abdullah University of Science and Technology, Saudi Arabia; e-mail [email protected]
Hussain is an assistant professor of electrical engineering at King Abdullah University of Science and Technology (KAUST). He received his PhD degree in electrical engineering (solid state electronics) from the University of Texas at Austin in 2005, with a PhD degree portfolio in nanotechnology. Recently, he has become the senior member grade of IEEE. Prior to joining KAUST, Hussain worked as a process integration assignee for Texas Instruments for 45 nm technology and beyond high-κ/metal gate planar and non-planar CMOS development. Since January 2008, he has served as the program manager of the Emerging Technology Program in SEMATECH. Currently, his research is focused on nanoelectronic devices and CMOS-compatible integrated nano-systems. Since January 2005, Hussain has authored 29 journal and 52 conference papers in highly acclaimed peer-reviewed publications. He also has given 25 invited talks and offered tutorials in various conventions.
Wei-Yip Loh
SEMATECH, Austin, TX 78741, USA; e-mail[email protected].
Loh is a project engineer at SEMATECH in Austin, TX. He received his BEng (Hons) and PhD degrees in electrical engineering from the National University of Singapore in 1997 and 2004, respectively. From 1997 to 2000, he was a senior engineer in the Yield Department with Chartered Semiconductor Mfg. Ltd., focusing on defect characterization and yield improvement activities. In 2000, Loh joined the Silicon Nano Device Lab in the Electrical and Computer Engineering Department of the National University of Singapore as a research engineer for his doctoral research in quasi-breakdown, gate oxide reliability, and electrical characterization of silicon-based devices. He joined the Institute of Microelectronics (Singapore) in 2004 for his postdoctoral research in Si and SiGe CMOS device fabrication and characterization, as well as Si-based photonics, including wave-guided photo-detectors and modulators. Loh has been with SEMATECH since 2007, where his work focuses on Si, SiGe contacts, and tunneling devices for low power applications. He has published more than 30 technical papers and holds 5 U.S. patents.
Krishna Saraswat
Stanford University, California 94305, USA; e-mail [email protected].
Saraswat is the Rickey/Nielsen Chair Professor of Electrical Engineering at Stanford University. He received his PhD degree from Stanford in 1974. His research is on novel materials, structures, and process technology of silicon, germanium, and III–V devices and interconnects for nanoelectronics. He has graduated more than 70 doctoral students and has published more than 600 technical papers. Saraswat is a fellow of the IEEE. His honors include the Thomas Callinan Award from The Electrochemical Society in 2000, the Andrew Grove Award from IEEE in 2004, and the Technovisionary Award from the India Semiconductor Association in 2007.
Jinhui Song
Georgia Institute of Technology, Atlanta, Georgia 30332, USA.
Song is a postdoctoral resesarcher in Professor Z.L. Wang’s group in the School of Materials Science and Engineering at the Georgia Institute of Technology (Georgia Tech). He received his PhD degree (2008) from the School of Materials Science and Engineering from Georgia Tech. Song and his PhD degree advisor co-invented the nanogenerator, which received worldwide news coverage. Song has received a number of awards, including a research fellowship with the King Abdullah University of Science and Technology Global Research Partnership (2009), the 2007 Materials Research Society Graduate Student Silver Award, and the 2006 Chinese Government Award for Outstanding Self-Financed Students Abroad. He is the author or co-author of more than 30 journal articles and 3 U.S. patents. His papers have been cited more than 1,800 times through July 2010.
Huang-Chun Wen
Texas Instruments, Texas, USA; e-mail [email protected].
Wen has been working in the Analog Technology Development group at Texas Instruments since May 2007. She received her BS degree from the Electrical Engineering Department at the National Chiao Tung University (NCTU), Taiwan, in 2000. Wen earned her MS degree in electrical engineering from NCTU in 2002 and received her PhD degree from the Electrical and Computer Engineering Department at the University of Texas at Austin in 2006. In 2004, she joined SEMATECH and engaged in the research of high-κ/metal gate electrodes for the 32–45 nm CMOS technology and continued as a postdoctoral fellow working on non-volatile flash memory in 2007. Wen is author or co-author of more than 60 referred publications in journals and conference proceedings, including 3 invited talks.
H.-S. Philip Wong
Stanford University, California 94305, USA; e-mail [email protected]
Wong has been a professor of electrical engineering at Stanford University since September 2004. He received his BSc (Hons.), MS, and PhD degrees from the University of Hong Kong, Stony Brook University, and Lehigh University, respectively. From 1988 to 2004, Wong was with the IBM T.J. Watson Research Center. His present research covers a broad range of topics, including carbon nanotubes, semiconductor nanowires, self-assembly, exploratory logic devices, nanoelectromechanical relays, device modeling, and novel memory devices such as phase change memory and metal oxide resistance change memory. He is a fellow of the IEEE and served on the Electron Devices Society AdCom as an elected member (2001 to 2006). He served as the editor-in-chief of the IEEE Transactions on Nanotechnology in 2005 to 2006, sub-committee chair of the ISSCC (2003 to 2004), general chair of the IEDM (2007), and is currently a member of the executive committee of the Symposia of VLSI Technology and Circuits (2007 to 2010).