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Chemical Vapor Deposition of Copper for Advanced On-Chip Interconnects

Published online by Cambridge University Press:  29 November 2013

A.V. Gelatos ,
A. Jain ,
R. Marsh  and
C.J. Mogab
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Extract

Continued dimensional scaling of the elements of integrated circuits places significant restrictions on the width, density, and current carrying capability of metallic interconnects. It is expected that, by the year 2000, the transistor channel length will be at 0.18 μm, while microprocessors will pack more than 15 million transistors over an area ~700 mm. To conserve area, interconnects will continue to be stacked at an increasing number of levels (six by the year 2000, versus four in today's leading microprocessors), and the minimum spacing and width within an interconnect layer will shrink to 0.3 μm. In addition, it is expected that future interconnects will need to sustain increasingly higher current densities without electromigration failures.

Aluminum alloys are the conductors of choice in present-day interconnects, and much effort is focused on means to extend the usefulness of aluminum through improvements in reliability, either by new alloy formulations or by the development of complicated multimetal stacks. A more radical approach, which is gaining increased attention, is the replacement of aluminum altogether by copper. The bulk resistivity of copper is significantly lower than that of aluminum (1.7 μΩ cm for Cu versus 3.0 μΩ cm for Al-Cu), which is expected to translate to interconnects of higher performance because of reduction in signal propagation delay. In addition, the significantly higher melting temperature of copper (~1100°C versus ~600°C for Al-Cu alloys) and its higher atomic weight are expected to translate to improved resistance to electromigration.

Type
Copper Metallization in Industry
Information
MRS Bulletin , Volume 19 , Issue 8 , August 1994 , pp. 49 - 54
Copyright
Copyright © Materials Research Society 1994

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