Hostname: page-component-78c5997874-v9fdk Total loading time: 0 Render date: 2024-11-12T22:20:51.576Z Has data issue: false hasContentIssue false

Optimization of Ion Implantation processes for 4H-SiC DIMOSFET

Published online by Cambridge University Press:  18 May 2016

N. Piluso
Affiliation:
STMicroelectronics, Stradale Primosole, 50, 95100 Catania, Italy.
E. Fontana
Affiliation:
STMicroelectronics, Stradale Primosole, 50, 95100 Catania, Italy.
M.A. Di Stefano
Affiliation:
STMicroelectronics, Stradale Primosole, 50, 95100 Catania, Italy.
G. Litrico
Affiliation:
IMM-CNR, VIII Strada, 5, 95121 Catania, Italy.
S. Privitera
Affiliation:
IMM-CNR, VIII Strada, 5, 95121 Catania, Italy.
A. Russo
Affiliation:
STMicroelectronics, Stradale Primosole, 50, 95100 Catania, Italy.
S. Lorenti
Affiliation:
STMicroelectronics, Stradale Primosole, 50, 95100 Catania, Italy.
S. Coffa
Affiliation:
STMicroelectronics, Stradale Primosole, 50, 95100 Catania, Italy.
F. La Via*
Affiliation:
IMM-CNR, VIII Strada, 5, 95121 Catania, Italy.
*
Get access

Abstract

In this paper the defects generated by ion implantation in 4H-SiC DIMOSFET (Double Implanted MOSFETs), and their evolution after annealing process, have been studied in detail. The point defects generated by the source or body implantation process have been detected by micro-photoluminescence (µPL) and the effect of these defects on the electrical characteristics of the DIMOSFET has been studied. The role of the annealing process has been carefully investigated by using different temperatures. It appears fundamental for the restoring of the crystal damage. The effect of the ion implantation dose has been investigated as well. By reducing the source ion implanted dose a large decrease of point defects has been detected and a considerable improvement of the electrical characteristic of the DIMOSFET has been observed.

Type
Articles
Copyright
Copyright © Materials Research Society 2016 

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

Fundamentals of Power Semiconductor Devices, B. Jayant Baliga (2008).Google Scholar
Peters, D., Schörner, R., Friedrichs, P., and Stephani, D., Mater. Sci. Forum, 433–436, (2003) 769.Google Scholar
Ryu, Sei-Hyung, Agarwal, A., Richmond, J., Palmour, J., Saks, N., and Williams, J., IEEE Electron Device Lett. 23, (2002) 321.Google Scholar
Ryu, S.-H., Agarwal, A., Krishnaswami, S., Richmond, J., and Palmour, J., Mater. Sci. Forum 457–460 (2004) 1385.Google Scholar
Matocha, K., Dunne, G., Soloviev, S., and Beaupre, R., IEEE Trans. Electron Devices 55 (2008) 1830.Google Scholar
Gurfinkel, M., Potbhare, S., Xiong, H. D., Suehle, J. S., Shapira, Yoram, Lelis, A. J., Habersat, D., and Goldsman, N., JOURNAL OF APPLIED PHYSICS 105 (2009) 084511.Google Scholar
Kawahara, K., Alfieri, G., Hiyoshi, T., Pensl, G. and Kimoto, T., Mater. Sci. Forum, 645-648, (2010) 651654.Google Scholar