Hostname: page-component-586b7cd67f-g8jcs Total loading time: 0 Render date: 2024-11-28T12:39:01.950Z Has data issue: false hasContentIssue false
  • English
  • Français

Fabrication and characterization of metal-ferroelectric-insulator-Si diodes and transistors with different HfSiON buffer layer thickness

Published online by Cambridge University Press:  31 January 2011

Xubing Lu ,
Hiroshi Ishiwara  and
Kenji Maruyama
Xubing Lu*
Affiliation:
Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, Midori-Ku, Yokohama 226-8502, Japan
Hiroshi Ishiwara
Affiliation:
Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, Midori-Ku, Yokohama 226-8502, Japan
Kenji Maruyama
Affiliation:
Fujitsu Laboratories Ltd., Morinosato-Wakamiya, Atsugi 243-0197, Japan
*
a)Address all correspondence to this author. e-mail: [email protected]
Get access

Abstract

Metal-ferroelectric-insulator-Si (MFIS) structures using HfSiON as buffer layers were fabricated, and the impact of buffer layer thickness on the electrical properties of the MFIS devices was investigated. HfSiON films with thickness ranging from 1 to 4 nm were deposited by electron beam evaporation, which exhibited much reduced leakage current when compared to that of SiO2 with the same equivalent oxide thickness. From the viewpoint of polarization and charge injection, the flatband voltage and memory window width dependent on the sweeping voltages were discussed for the MFIS diodes with 1-, 2-, and 4-nm-thick HfSiON buffer layers. Small leakage current as well as excellent long-term data retention characteristics were found for all of these samples. It was also found that MFIS diodes with 2-nm-thick HfSiON buffer layer have the largest memory window width. Ferroelectric-gate transistors fabricated with a Pt/SBT(300nm)/HfSiON (2 nm)/Si gate structure showed a memory window of 0.8 V and a high drain current on/off ratio of 108 for the gate voltage sweep between +4 and −4 V. All of these excellent electrical properties proved that HfSiON acts as an excellent barrier for suppressing both leakage current and atomic interdiffusion.

Keywords

Dielectric propertiesElectronic materialFerroelectric
Type
Articles
Information
Journal of Materials Research , Volume 23 , Issue 10 , October 2008 , pp. 2727 - 2732
Copyright
Copyright © Materials Research Society 2008

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1Ishiwara, H.: Recent progress in ferroelectric-gate FETs in Ferroelectric Thin Films XI, edited by D.Y. Kaufman, S. Hoffmann-Eifert, S.R. Gilbert, A. Aggarwal, and M. Shimizu (Mater. Res. Soc. Symp. Proc.748, Warrendale, PA, 2003), U9.5CrossRefGoogle Scholar
2Kim, K-H., Han, J-P., Jung, S-W., Ma, T-P.: Ferroelectric DRAM (FEDRAM) FET with Metal/SrBi2Ta2O9/SiN/Si gate structure. IEEE Electron Device Lett. 23, 82 2002Google Scholar
3Han, J.P., Koo, S.M., Ritchter, C.A., Vogel, E.M.: Influence of buffer layer thickness on memory effects of SrBi2Ta2O9/SiN/Si structures. Appl. Phys. Lett. 85, 1439 2004CrossRefGoogle Scholar
4Choi, H.S., Kim, E.H., Choi, I-H., Kim, Y.T., Choi, J.H., Lee, J.Y.: The effect of ZrO2 buffer layer on electrical properties in Pt/SrBi2Ta2O9/ZrO2/Si ferroelectric gate oxide structure. Thin Solid Films 388, 266 2001CrossRefGoogle Scholar
5Park, B.E., Ishiwara, H.: Electrical properties of LaAlO3/Si and Sr0.8Bi2.2Ta2O9/LaAlO3/Si structures. Appl. Phys. Lett. 79, 806 2001CrossRefGoogle Scholar
6Li, A.D., Wang, Y.J., Shao, Q.Y., Cheng, J.B., Wu, D., Ling, H.Q., Bao, Y.J., Wang, M., Liu, Z.G., Ming, N.B.: Characteristics of SrBi2Ta2O9 ferroelectric films on Si using LaAlO3 thin film as an insulator. Appl. Phys. A 81, 1273 2005CrossRefGoogle Scholar
7Takahashi, M., Sakai, S.: Self-aligned-gate metal/ferroelectric/insulator/semiconductor field-effect transistors with long memory retention. J. Jpn. Appl. Phys. 44, L800 2005CrossRefGoogle Scholar
8Sakai, S., Ilangovan, R.: Metal-ferroelectric-insulator-semiconductor memory FET with long retention and high endurance. IEEE Electron Device Lett. 25, 369 2004CrossRefGoogle Scholar
9Takahashi, K., Aizawa, K., Park, B.E., Ishiwara, H.: Thirty-day-long data retention in ferroelectric-gate field-effect transistors with HfO2 buffer layers. J. Jpn. Appl. Phys 44, 6218 2005CrossRefGoogle Scholar
10Park, B.E., Takahashi, K., Ishiwara, H.: Five-day-long ferroelectric memory effect in Pt/(Bi,La)4Ti3O12/HfO2/Si structures. Appl. Phys. Lett. 85, 4448 2004CrossRefGoogle Scholar
11Lu, X.B., Maruyama, K., Ishiwara, H.: Metal-ferroelectric-insulator-Si devices using HfTaO buffer layers. Semicond. Sci. Technol. 23, 045002 2008CrossRefGoogle Scholar
12Lu, X.B., Maruyama, K., Ishiwara, H.: Characterization of HfTaO films for gate oxide and metal-ferroelectric-insulator-silicon device applications. J. Appl. Phys. 103, 044105 2008CrossRefGoogle Scholar
13Gusev, E.P., Narayanan, V., Frank, M.M.: Advanced high-kappa dielectric stacks with polySi and metal gates: Recent progress and current challenges. IBM J. Res. & Dev. 50, 387 2006CrossRefGoogle Scholar
14Hoko, H., Aoki, C., Tabuchi, Y., Tamura, T., Maruyama, K., Arimoto, Y., Ishiwara, H.: Electrical properties of Pt/BLT/HfSiON/Si structure for 1T-type ferroelectric memory. Integr. Ferroelectr. 79, 205 2006CrossRefGoogle Scholar
15Wang, X., Liu, J., Zhu, F., Yamada, N., Kwong, D-L.: A simple approach to fabrication of high-quality HfSiON gate dielectrics with improved nMOSFET performances. IEEE Trans. Electron. Devices 51, 1798 2004CrossRefGoogle Scholar