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Published online by Cambridge University Press: 13 September 2016
In this paper, the structure of a common field-effect transistor (FET)-based negative impedance converter (NIC) that behaves as a negative capacitor is presented. The nonlinear modeling, analysis, and simulation of this non-Foster structure are presented in the time domain and the transient response of the circuit can be used to study the stability of the circuit. For the analysis of the circuit performance, the linear time-dependent modeling approach is used. This method is based on determination of the circuit parameters at each step according to parameters of the previous steps, bias voltages, and the input signal. Results of the proposed method for analysis of non-Foster circuit are compared with those of nonlinear analysis using commercial software, which shows a good agreement together and the proposed method is validated. Based on the analysis, the nonlinear capacitance of non-Foster circuit is extracted and based on the simple second order model of current source of FET, the analytic model of negative capacitor is extracted and improved by curve fitting. The proposed model results have a good agreement with simulation results of NIC's circuit.