Hostname: page-component-cd9895bd7-hc48f Total loading time: 0 Render date: 2024-12-18T17:53:52.032Z Has data issue: false hasContentIssue false

Design and characterization of an integrated microwave generator for BIST applications

Published online by Cambridge University Press:  27 February 2014

Imene Lahbib*
Affiliation:
NXP Semiconductors, 14906 Caen Cedex 09, France. Phone: +33 2 31 45 60 79 LaMIPS, Laboratoire commun UMR CNRS 6508-NXP-PRESTO, 14050 Caen, France
Mohamed Aziz Doukkali
Affiliation:
LaMIPS, Laboratoire commun UMR CNRS 6508-NXP-PRESTO, 14050 Caen, France
Philippe Descamps
Affiliation:
LaMIPS, Laboratoire commun UMR CNRS 6508-NXP-PRESTO, 14050 Caen, France
Patrice Gamand
Affiliation:
NXP Semiconductors, 14906 Caen Cedex 09, France. Phone: +33 2 31 45 60 79
Christophe Kelma
Affiliation:
NXP Semiconductors, 14906 Caen Cedex 09, France. Phone: +33 2 31 45 60 79
Olivier Tesson
Affiliation:
NXP Semiconductors, 14906 Caen Cedex 09, France. Phone: +33 2 31 45 60 79 LaMIPS, Laboratoire commun UMR CNRS 6508-NXP-PRESTO, 14050 Caen, France
*
Corresponding author: I. Lahbib Email: [email protected]

Abstract

This paper presents a circuit architecture for a new integrated on chip test method for microwave circuits. The proposed built-in-self-test (BIST) cell targets a direct low-cost measurement technique of the gain and the 1 dB input compression point (CP1) of a K-band satellite receiver in the 18–22 GHz frequency bandwidth. A signal generator at the radiofrequency (RF) front end input of the device under test (DUT) has been integrated on the same chip. To inject this RF signal, a loopback technique has been used and the design has been accommodated for it. This paper focuses on the design of the most sensitive block of the BIST circuit, i.e. the RF signal generator. This circuit, fabricated in a SIGe:C BiCMOS process, consumes 10 mA. It presents a dynamic power range of 17 dB (−41; −24 dBm) and operates in a frequency range of 5.6 GHz (17.5; 23 GHz). This BIST circuit gives new perspectives in terms of test strategy, cost reduction, and measurement accuracy for microwave-integrated circuits and could be adapted for mm-wave circuits.

Type
Articles Selected from the 2013 National Microwave Days in France
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2014 

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

[1]Ferrario, J.; Wolf, R.; Moss, S.: Architecting millisecond test solutions for wireless phone RFIC's, in IEEE Int. Test Conf., 2003.Google Scholar
[2]Sleiman, S.B.; Akour, A.; Khalil, W.; Ismail, M.: Millimeter-wave BiST and BiSC using a high-definition sub-ranged detector in 90 nm CMOS, in IEEE MWSCAS, 2010.CrossRefGoogle Scholar
[3]Huang, Y.C.; Hsieh, H.H.; Lu, L.H.: A Build-in self-test technique for RF low-noise amplifiers. IEEE Trans. Microw. Theory Tech., 56 (2008), 10351042.CrossRefGoogle Scholar
[4]Wang, Q.; Soma, M.: RF front-end system gain and linearity built-in test, in IEEE VLSI Test Symp., 2006.Google Scholar
[5]Ryu, J.Y.; Kim, B.C.; Sylla, I.: A new BIST scheme for 5 GHz low noise amplifiers, in IEEE European Test Symp., 2004.Google Scholar
[6]Van Noort, W.D. et al. : BiCMOS technology improvements for microwave application, in BiCMOS Circuits and Technology Meeting, 2010.Google Scholar
[7]Abidi, A.A.: Phase noise and jitter in CMOS ring oscillators. J. Solid State Circuits, 41 (2006), 18031816.Google Scholar
[8]Verdier, J.; Pérez, J.C.N.; Gontrand, C.: Design and optimization of 20 GHz LC-VCOs in SiGe:C BiCMOS technology, In IEEE Circuits Syst. Commun., (2008), 648652.Google Scholar
[9]Zhan, J.H.C.; Duster, J.S.; Kornegay, K.T.: A 25-GHz emitter degenerated LC VCO. IEEE J. Solid State Circuits, 39 (2004), 20622064.Google Scholar
[10]Sansen, M.C.; Meyer, G.: Distortion in bipolar transistor variable gain amplifiers. IEEE J. Solid State Circuits, 8 (1973), 275282.CrossRefGoogle Scholar
[11]Tesson, O.; Wane, S.: Two complementary methods for parasitic coupling reduction within MMIC's, in 3rd Int. Conf. CENICS, 2010.Google Scholar
[12]Poon, A. et al. : Reduction of inductive crosstalk using quadrupole inductors. IEEE J. Solid-State Circuits, 44 (2009), 17561764.CrossRefGoogle Scholar