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80-GHz-band low-power sub-harmonic mixer IC with a bottom-LO-configuration in 130-nm SiGe BiCMOS

Published online by Cambridge University Press:  28 March 2016

Xin Yang
Affiliation:
The Graduate School of Information, Production and Systems, Waseda University, 2-7 Hibikino Wakamatsu-ku, Kitakyushu-shi, Fukuoka, Japan
Xiao Xu
Affiliation:
The Graduate School of Information, Production and Systems, Waseda University, 2-7 Hibikino Wakamatsu-ku, Kitakyushu-shi, Fukuoka, Japan
Takayuki Shibata
Affiliation:
Research Laboratories, DENSO CORPORATION, 500-1, Minamiyama, Komenoki-cho, Nisshin-shi, Aichi, Japan. Phone: +81-93-692-5358
Toshihiko Yoshimasu*
Affiliation:
The Graduate School of Information, Production and Systems, Waseda University, 2-7 Hibikino Wakamatsu-ku, Kitakyushu-shi, Fukuoka, Japan
*
Corresponding author:T. Yoshimasu Email: [email protected]

Abstract

In this paper, a W-band (80 GHz) sub-harmonic mixer (SHM) IC is designed, fabricated and measured in 130-nm SiGe BiCMOS technology. The presented SHM IC makes use of a common emitter common collector transistor pair structure with a bottom-LO-configuration to decrease the LO power requirement and a tail current source to flatten the conversion gain. On-chip Marchand balun is designed for W-band on-wafer measurements. The SHM IC presented in this paper has exhibited a conversion gain of 3.9 dB at 80 GHz RF signal with an LO power of only −7 dBm at 39.5 GHz. The mixer core consumes only 0.68 mA at a supply voltage of 3.3 V.

Type
Research Papers
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2016 

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References

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