A 31 GHz body-biased configurable power amplifier in 28 nm FD-SOI CMOS for 5 G applications
Published online by Cambridge University Press: 25 August 2020
Abstract
This paper presents a 31 GHz integrated power amplifier (PA) in 28 nm Fully Depleted Silicon-On-Insulator Complementary Metal Oxide Semiconductor (FD-SOI CMOS) technology and targeting SoC implementation for 5 G applications. Fine-grain wide range power control with more than 10 dB tuning range is enabled by body biasing feature while the design improves voltage standing wave ratio (VSWR) robustness, stability and reverse isolation by using optimized 90° hybrid couplers and capacitive neutralization on both stages. Maximum power gain of 32.6 dB, PAEmax of 25.5% and Psat of 17.9 dBm are measured while robustness to industrial temperature range and process spread is demonstrated. Temperature-induced performance variation compensation, as well as amplitude-to-phase modulation (AM-PM) optimization regarding output power back-off, are achieved through body-bias node. This PA exhibits an International Technology Roadmap for Semiconductors figure of merit (ITRS FOM) of 26 925, the highest reported around 30 GHz to authors' knowledge.
Keywords
- Type
- IJMWT Special Issue on the 2019 National Microwave Days
- Information
- International Journal of Microwave and Wireless Technologies , Volume 13 , Issue 1 , February 2021 , pp. 3 - 20
- Copyright
- Copyright © Cambridge University Press and the European Microwave Association 2020
References
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