Book contents
- Frontmatter
- Contents
- Foreword
- Preface
- List of Abbreviations
- List of Symbols
- 1 Introduction
- 2 Review on Modeling Junctionless FETs
- 3 The EPFL Charge-based Model of Junctionless Field-Effect Transistors
- 4 Model-Driven Design-Space of Junctionless FETs
- 5 Generalization of the Charge-based Model: Accounting for Inversion Layers
- 6 Predicted Performances of Junctionless FETs
- 7 Short-Channel Effects in Symmetric Junctionless Double-Gate FETs
- 8 Modeling AC Operation in Symmetric Double-Gate and Nanowire JL FETs
- 9 Modeling Asymmetric Operation of Double-Gate Junctionless FETs
- 10 Modeling Noise Behavior in Junctionless FETs
- 11 Carrier Mobility Extraction Methodology in JL and Inversion-Mode FETs
- 12 Revisiting the Junction FET: A Junctionless FET with an ∞ Gate Capacitance
- 13 Modeling Junctionless FET with Interface Traps Targeting Biosensor Applications
- Appendix A Design-Space of Twin-Gate Junctionless Vertical Slit FETs
- Appendix B Transient Off-Current in Junctionless FETs
- Appendix C Derivatives of Mobile Charge Density with Respect to V GS and V DS
- Appendix D Global Charge Density at Drain in Depletion Mode
- Appendix E Global Charge Density at Drain in Accumulation Mode
- Appendix F The EPFL Junctionless MODEL
- References
- Index
1 - Introduction
Published online by Cambridge University Press: 24 February 2018
- Frontmatter
- Contents
- Foreword
- Preface
- List of Abbreviations
- List of Symbols
- 1 Introduction
- 2 Review on Modeling Junctionless FETs
- 3 The EPFL Charge-based Model of Junctionless Field-Effect Transistors
- 4 Model-Driven Design-Space of Junctionless FETs
- 5 Generalization of the Charge-based Model: Accounting for Inversion Layers
- 6 Predicted Performances of Junctionless FETs
- 7 Short-Channel Effects in Symmetric Junctionless Double-Gate FETs
- 8 Modeling AC Operation in Symmetric Double-Gate and Nanowire JL FETs
- 9 Modeling Asymmetric Operation of Double-Gate Junctionless FETs
- 10 Modeling Noise Behavior in Junctionless FETs
- 11 Carrier Mobility Extraction Methodology in JL and Inversion-Mode FETs
- 12 Revisiting the Junction FET: A Junctionless FET with an ∞ Gate Capacitance
- 13 Modeling Junctionless FET with Interface Traps Targeting Biosensor Applications
- Appendix A Design-Space of Twin-Gate Junctionless Vertical Slit FETs
- Appendix B Transient Off-Current in Junctionless FETs
- Appendix C Derivatives of Mobile Charge Density with Respect to V GS and V DS
- Appendix D Global Charge Density at Drain in Depletion Mode
- Appendix E Global Charge Density at Drain in Accumulation Mode
- Appendix F The EPFL Junctionless MODEL
- References
- Index
Summary
The Birth of the Transistor
Since its invention in 1907 by Lee de Forest, the vacuum tube has been a major driver for electronics and communications technologies. However, vacuum tubes have conceptual limits. Besides being quite expensive, they have reliability issues, high energy consumption, and miniaturization limits. To address these limitations, AT&T, one of the main US phone companies, tasked its R&D unit – Bell Laboratories – with the development of an innovative device that would be cheaper, smaller, and more reliable – in short, a good substitute for the vacuum tube.
The initial idea for “transistors” came from Edgar Julius Lilienfeld in 1925 [6]. The scientist patented in Canada (1925) and successively in the United States (1928) the first field-effect semiconductor device designed to change the resistivity with applied voltages. However, due to the lack of dedicated technology, Lilienfeld never had the chance to validate his concept. It's interesting to note that his transistor idea was quite similar to today's accumulation-mode (AM) transistors.
The point-contact transistor built by John Bardeen and Walter Brattain at Bell Laboratories in the United States in December 1947 was the first solid-state transistor ever created. The two scientists, led by the physicist William Bradford Shockley, discovered the new amplification device while working on theory and experiments on solid-state materials (germanium in this case). This first proof of “controlled resistance” and “amplification” in a solid-state device is considered as the birth of the transistor, and its inventors were jointly awarded the Nobel Prize in physics in 1956 for this achievement.
After invention of the point-contact transistor, Bell Labs followed up with design and fabrication of solid-state amplifiers, gaining a deep understanding of transistors physics. A fully working junction transistor based on Shockley's design, consisting of adjacent semiconductors junctions, was fabricated in 1951 [7]. In 1954, at Texas Instruments Gordon Teal demonstrated the first silicon transistor using the knowledge gained by growing high purity crystals while working at Bell Labs.
The Metal-Oxide–Semiconductor Field-Effect Transistor
By the end of 1950s, all solid-state transistors were bipolar junction transistors (BJT).
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- Publisher: Cambridge University PressPrint publication year: 2018