Published online by Cambridge University Press: 05 April 2016
Introduction
A dominant theme in the evolution of integrated electronics over past decades has been Moore's law, which has led to development of silicon-based transistors with dramatically improved operating speeds and levels of integration, as well as reduced power dissipation. Although the driving motivation for the technology development has been primarily application to digital circuits, silicon-based transistors are poised, by virtue of their very high frequency response, to provide mm-wave and THz circuits with also dramatically improved performance as well as low cost. One of the tradeoffs that has been necessary in the development of scaled silicon devices, however, has been a reduction in voltage handling capability. As a result, conventional scaled silicon transistors are not very well suited to power amplifiers, which perform best with high voltage swings along with high current swings. Recent research, however, has pointed to a circuit design approach that can overcome to a considerable degree the limitations of the basic transistors: the technique of series-connection, or stackingİ of multiple devices to generate a composite structure that can handle higher voltages. The stacking technique has opened the door to higher output power as well as higher efficiency and greater bandwidth, since the resulting impedance transformations needed to generate amplifier outputs at 50 ohm levels become easier to implement with low loss and high bandwidth. This chapter describes in detail the background, design considerations and benefits of stacked Si devices in mm-wave power amplifiers. Emphasis is given to stacked CMOS devices, although bipolar transistors and HBTs can also be stacked as described in Chapter 5. A review of Si FET characteristics is first given, along with a description of the impact of voltage handling on power amplifier characteristics. Stacked FET amplifiers at low microwave frequencies, which are emerging as important contenders for cell phone handsets, is then reviewed. Key design considerations for stacking at mm-wave frequencies are then presented. The chapter also describes a number of mm-wave power amplifier example designs in detail.
Motivation for stacking
As a result of Moore's law, transistor current gain cut-off frequencies (fT) have been increasing rapidly as the transistor dimensions have been reduced. Figure 6.1 illustrates recent fT measurement results for n-MOS devices at the 90nm node and below, as a function of gate length (which typically is smaller than the metallization half-pitch which defines the technology node).
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