The paper presents the results of studies on the effect of transistor DC operating conditions on GaN power amplifiers’ (PAs) power efficiency and linearity improved by digital predistortion (DPD). The single-ended 10 W (ISM2.45 GHz) and 150 W (3.4/3.6 GHz) GaN HEMT PAs excited by wideband LTE20 E-TM1.1 signal were tested. To check the applicability of the small-signal approach for designing of LTE signals’ PAs, the 150 W PA using transistor model extracted from S-parameters measured at the properly selected operating points was designed. The conventional DPD based on the indirect learning architecture and the memory polynomial model of PA non-linearity was implemented. The results of the research show that in case of class A and B PAs operating up to several dozen watts, an additional improvement in adjacent channel leakage ratio (ACLR) of the order of a few dB only by an increase in the quiescent drain current of PA transistor can be achieved. However, a noticeable ACLR improvement with a coincident increase in power-added efficiency (PAE) can be obtained by choosing the compromise DC operating point and using DPD. In the case of high-PAs, the linearity and efficiency are strongly dependent on the load of a transistor, thus the role of DPD is significantly increased.

This paper presents a fully digital transmitter chain from baseband to antenna, including a modulator, two truly digital (i.e. fully switched) microwave power amplifiers and a transmit/receive switch. Both, amplifier and switch monolithic microwave integrated circuits were implemented in a GaN HEMT process. The novel amplifier design provides greatly reduced complexity, needing only three voltage sources. Measurements were conducted using 5, 20, and 100 MHz wide baseband signals. Carrier frequencies cover the 900 and 2000 MHz bands. For the 5 MHz BB signal an ACLR of over 52 dB is reached, fulfilling the 3GPP specs for base station use while still maintaining a final-stage drain efficiency of 46% at 6.5 dB peak to average power ratio. Full-scale output power at 30 V supply voltage was measured to exceed 3 W at 80% drain efficiency. Further features of this digital amplifier approach include small form factor and frequency agility, making it an ideal candidate for software defined radio.

This paper presents for the first time a wavetable-based coding scheme to generate a high-speed binary input signal for digital RF power amplifiers. The approach maximizes the utilization of the time domain handling capabilities of the pulse forming circuit. Key features are a greatly improved output spectrum purity in comparison with common digital modulators, the ability to adjust the modulator to any given pulse forming hardware and a built-in signal correction option that comes without additional computational cost. To give a first impression on the modulators behavior and its possibilities to adapt to different hardware constraints, simulations are carried out for different parameter variations and for different baseband bandwidths. Furthermore, the proposed concept is emulated with an arbitrary waveform generator to gather additional measurement data. For a 5 MHz wideband code division multiple access (WCDMA) signal (6.5 dB peak-to-average power ratio) at 900 MHz, an error vector magnitude (EVM) of 0.26% and better than >58 dB adjacent channel leakage ratio (ACLR) were recorded. To the authors’ knowledge, these are the best values achieved so far for a single-bit coding scheme without digital predistortion that still maintains maximum power coding efficiency.

An envelope tracking (ET) radio frequency (RF) power amplifier (PA) is described intended for handsets and applications where a large number of PAs are needed. Instead of the usual split frequency architecture, a linear tracking charge pump structure is proposed. This allows the supply voltage of an RF PA to increase during the peaks of a high peak-to-average power ratio signal. When combined with an LDMOS RF PA, 42.9% efficiency was achieved at 31.3 dBm output power (POUT) when amplifying a 5 MHz bandwidth 8 dB PAPR 3rd Generation Partnership Project (3GPP) long term evolution signal. The first channel adjacent power ratio (ACPR) without digital pre-distortion was −30.4 dBc, meeting the 3GPP handset emission mask. The ACPR could be improved to −32.5 dBc by adopting a curved envelope shaping function at a reduced efficiency of 38.9%.

A combined class-AB and a Doherty power amplifier conceived for microwave backhaul in the 7 GHz frequency band are here presented and compared. They are fabricated in the same GaN monolithic process and have identical total active device periphery. For the given application, the linearity-efficiency trade-off for the two architectures is discussed. The two modules have been thoroughly characterized in linear and non-linear continuous wave conditions. Then, to evaluate linearity under the actual operative conditions, a system level characterization has been carried out, applying a modulated input signal and comparing the spectral responses of the two amplifiers with and without digital predistortion. A saturated output power of 40 dBm has been achieved by both circuits. At 6 dB of output back-off, the Doherty amplifier shows an efficiency of 33%, 10 points higher than that of the class-AB module. On the other hand, system level measurements show that, adopting the same predistorter complexity to comply with the reference standard emission masks, the Doherty amplifier needs at least 1 dB of extra back-off. This negatively affects its efficiency, therefore reducing the advantages it can claim with respect to the class-AB amplifier in continuous wave condition.

In this paper, two compact lumped-element band pass reconstruction filters for digital microwave power amplifiers applications in the 800 MHz band are presented. The filters, based on the trisection and quartet topologies, include cross-couplings which produce transmission zeros for maximum selectivity, and can be designed with practical element values. In contrast to common filter designs the input impedance characteristic is optimized broadband to values different from 50 Ω, as required for proper amplifier operation. Both filters achieve an insertion loss of around 0.8 dB and an equiripple bandwidth of 240 MHz (trisection) and 290 MHz (quartet), respectively, with improved out-of-band suppression. Results show that a considerable improvement in amplifier linearity and efficiency can be obtained with the new proposed filters, as compared with simpler filters traditionally used in power amplifier applications.

The effect of time misalignment between the radiofrequency (RF) input and tunable matching network control signal in dynamically load-modulated power amplifiers (Pas) is investigated in theory and practice. Moreover, the impact of different input signal statistics is considered. A simple amplifier model is used for the study, based on which the impact on output power, efficiency, and linearity is explored with various generic multi-tone signals. Furthermore, to experimentally verify the results, a 10 W dynamically load-modulated RF PA is measured. As expected, proper synchronization of the signals is crucial, especially as channel bandwidth increases. Additionally, it is shown that the input signal characteristics, such as the amplitude distribution, are important. Moreover, the prototype RF PA is measured with a 1.4 MHz long-term evolution (LTE) signal delivering an average output power of 33.9 dBm with 46% efficiency. Finally, high efficiency and linearity is maintained over output power by scaling the drain supply voltage.

A novel asymmetric “+” shaped fractal slotted circularly polarized microstrip antenna with a Yagi–Uda structure is proposed. Four asymmetric plus shape slots are embedded symmetrically in the center of all four quadrants of a square patch. To suppress undesirable higher modes, dumbbell-shaped defected ground structure (DGS) is introduced at the ground layer of the antenna. We introduce a method to compensate the reduction in gain occurring due to the presence of DGS, without changing in the overall size of the antenna. A 3 dB axial ratio bandwidth of 4 MHz at center frequency of 862 MHz, 10 dB impedance bandwidth of 13.20 MHz and a gain of 4.25 dB is achieved with the proposed antenna. A laboratory prototype of the proposed antenna is made to cross-verify the simulation results. Very good agreements between the two are obtained. The proposed antenna may prove useful for International Mobile Telecommunication application for designing high-gain arrays.

A new split frequency envelope modulator for envelope tracking radio-frequency power amplifiers is proposed based on a lead-lag network. By mathematically deriving the transfer functions of the lead-lag modulator and the conventional split frequency type, the lead-lag is shown to have a significantly flatter phase response. The frequency response of the two modulators is verified by simulation, where the phase transient of the lead-lag is significantly less than the 360° of the conventional type. They are further simulated with a 3 MHz bandwidth 3GPP long-term evolution (LTE) signal and the lead-lag shown to reduce the modulator's normalized root-mean-square error (NRMSE) from −27.3 to −39.2 dB. A practical demonstrator was developed around an existing high-efficiency modulator architecture. To maintain system efficiency synthetic impedance was incorporated in the low-frequency switched mode power supply (SMPS) path. This was achieved with voltage and current feedback around the SMPS. The dynamic wideband signal response was investigated by applying a 3 MHz LTE envelope signal to the modulator and comparing the input and output signals. The measured NRMSE was improved from −27.5 to −30.0 dB by adopting the lead-lag structure and the dynamic frequency response verifies correct operation.

In this paper, the design and test of a single-chip RF pulse-width modulator and driver (PWMD) aimed at exciting a high-power class-E GaN high-power stage at 435 MHz is described. For the required buffer size, avoiding potential ringing of the pulses within the buffer structure presents a major challenge in the design process. Therefore, a smaller test chip capable of driving capacitive loads of up to 5 pF was initially designed, fabricated, and tested. An approach based on three-dimensional electromagnetic simulations was used to validate the test results and offers excellent simulation accuracy. Based on the results obtained for test chip an enlarged PWMD chip capable of driving a 40 W high-power stage has been designed and tested on passive loads representing the targeted final stage.

We propose a definition of the efficiency bandwidth for a power amplifier (PA) using a modulated signal as the signal bandwidth at which the amplifier efficiency has dropped to a level of 90% of the maximum efficiency at small bandwidth. We introduce a Monte Carlo method to calculate the efficiency bandwidth for some popular PA architectures. The method assumes a given modulated signal at the load. From this load signal the wave forms at the drains of the transistors are derived and the energy dissipation in the transistors can be calculated. Using idealized transistors with no output capacitance the maximum realizable efficiency bandwidth of an asymmetrical Doherty amplifier is 60%, which is much larger than that of an outphasing amplifier, which is 14%. More realistic transistors that include output capacitances, need a matching circuit with a high Q-value which decreases the efficiency bandwidth. Using output capacitance values typical for LDMOS transistors, the asymmetrical Doherty amplifier shows an efficiency bandwidth of about 400 MHz for a signal centered at 1 GHz. For a signal at 2 GHz the efficiency bandwidth is found to be 520 MHz. Due to the fixed values of the output capacitances the efficiency bandwidth does not scale with frequency.

This paper shows that the two most common impedance transformation networks for power amplifiers (PAs) can be designed to achieve optimum transformation at two frequencies. Hence, a larger bandwidth for the required impedance transformation ratio is achieved. A design procedure is proposed, which takes imperfections like losses into account. Furthermore, an analysis method is presented to estimate the maximum uncompressed output power of a PA with respect to frequency. Based on these results, a fully integrated PA with a dual-band impedance transformation network is designed and its functionality is proven by large signal measurement results. The amplifier covers the frequency band from 450 MHz to 1.2 GHz (3 dB bandwidth of the output power and efficiency), corresponding to a relative bandwidth of more than 100%. It delivers 23.7 dBm output power in the 1 dB compression point, having a power-added efficiency of 33%.

We present the results obtained on a multi-mode multi-band 20 W Monolithic Microwave Integrated Circuit (MMIC) power amplifier. The proposed two-stage circuit is based on the silicon Laterally Diffused Metal Oxide Semiconductor (LDMOS) technology. Thanks to dedicated design techniques, it can cover the Digital Cellular Service (DCS), Personal Communications Service (PCS), and UMTS bands (ranging from 1.805 to 2.17 GHz) and deliver more than 20 W of output power, 30 dB of gain and 50% of power added efficiency. When combined in a Doherty configuration with an incremental 40 W MMIC in a dual-path package, the resulted asymmetric MMIC (an industry first) can deliver an unprecedented LDMOS MMIC efficiency of up to 44% at 8 dB back-off in the UMTS band. Then, the DPA has been optimized in conjunction with a novel RF pre-distortion technique, leading to 33–80% energy saving at the system level.

Two novel memory polynomial models are derived based on physical knowledge of a general power amplifier (PA). The derivations are given in detail to facilitate derivations of other model structures. The model error in terms of normalized mean square error (NMSE) and adjacent channel error power ratio (ACEPR) of the novel model structures are compared to that of established models based on the number of parameters using data measured on two different amplifiers, one high-power base-station PA and one low-power general purpose amplifier. The novel models show both lower NMSE and ACEPR for any chosen number of parameters compared to the established models. The low model errors make the novel models suitable candidates for both modeling and digital predistortion.

This paper presents the analysis and design of a wideband asymmetrical Doherty amplifier. The frequency response of the output combining network of the Doherty amplifier with arbitrary back-off level configuration is analyzed. Other bandwidth-limiting factors were discussed and analyzed as well. A number of performance enhancement techniques were taken into consideration to obtain high and flat back-off efficiency over the amplifier design band of 1.7–2.25 GHz. The designed Doherty amplifier had, at 8.0–9.9 dB output back-off, a minimum efficiency of η = 50% [power-added efficiency of 45%], measured near 40 dBm of output power, and over 28% bandwidth. Using digital predistortion (DPD) linearization, an adjacent-channel leakage ratio (ACLR) of −43 dBc was obtained for a single-carrier W-CDMA signal, at 40.9 dBm and 46% of average output power and drain efficiency, respectively. The designed amplifier represents the first wideband Doherty amplifier reported over extended power back-off range.

This work presents radio-frequency-microelectromechanical-system (RF-MEMS)-based tunable matching networks for a multi-band gallium nitride (GaN) power amplifer (PA) application. In the frequency range from 3.5–8.5 GHz return losses of 5–10 dB were measured for the input network, matching impedances close to the border of the Smith chart. For the output matching network return losses of 10–20 dB and insertion losses of 1.3–2 dB were measured. The matching networks can tune the PA to four different operating frequencies, as well as changing the transistor's mode of operation from maximum delivered-output-power to maximum power-added-efficiency (PAE), while keeping the operating frequency constant. Furthermore, different single pole double throw (SPDT)-switches are designed and characterized, to be used in frequency-agile transmit/receive-modules (T/R modules).

This paper presents power results of L-band packaged hybrid amplifiers using InAlN/GaN/SiC HEMT power dies. The high-power densities achieved both in pulsed and continuous wave (cw) modes confirm the interest of such technology for high-frequency, high-power, and high-temperature operation. We present here record RF power measurements for different versions of amplifiers. Up to 260 W, i.e. 3.6 W/mm, in pulsed (10 µs/10%) conditions, and 105 W, i.e. 2.9 W/mm, in cw conditions were achieved. Such results are made possible thanks to the impressive performances of InAlN/GaN transistors, even when operating at high temperatures. Unit cell transistors deliver output powers of 4.3 W/mm at Vds = 40 V in the cw mode of operation at the frequency of 2 GHz. The transistor process is described here, as well as the amplifiers design and measurements, with a particular focus to the thermal management aspects.

In this paper, we report a new high-speed and high-power switching circuit based on GaN HEMT's. The elementary switching cell, composed of two GaN HEMT's and two resistors, acts like a power threshold comparator with high-output voltage. Theoretical analysis of static and dynamic circuit operation points out the dependence of efficiency and switching speed to the main circuit elements. Four switching cells are then combined together thanks to SiC Schottky diodes to design a multi-level power switch that can be used as a power supply modulator for envelope tracking power amplifiers. The designed four-level supply modulator, based on Nitronex GaN HEMT's, exhibits more than 75% of efficiency for an envelope signal up to 4 MHz, a switching frequency of 20 MHz and output voltages in the range of 12–30 V.

In the present paper, we present a dynamic gate biasing technique applied to a 10 W, S-band GaN amplifier. The proposed methodology addresses class-B operation of power amplifiers that offers the potential for high efficiency but requires a careful attention to maintain good linearity performances at large output power back-off. This work proposes a solution to improve the linearity of class-B amplifiers driven by radio frequency-modulated signals having large peak to average power ratios. An important aspect of this work concerns the characterization of the dynamic behavior of GaN devices for gate bias trajectory optimization. For that purpose, the experimental study reported here is based on the use of a time-domain envelope setup. A specific gate bias circuit has been designed and connected to a 10 W – 2.5 GHz GaN amplifier demo board from CREE. Compared to conventional class-B operation with a fixed gate bias, a 10-dB improvement in terms of third-order intermodulation is reached. When applied to the amplification of 16-QAM signals the proposed technique demonstrates significant ACPR reduction of order of 6 dB along with error vector magnitude (EVM) improvements of five points over 8 dB output power back-off with a minor impact on power-added efficiency performances.

This paper presents the design methodology and the realization of a highly linear and power-efficient reconfigurable dual-band amplifier based on the continuous/Class-ABJ approach. The Class-ABJ theory allows presenting different reactive solutions on both fundamental and second harmonic terminations compared with the standard Class-AB mode. Despite the various terminations, a constant optimum output performance in terms of power, gain, and efficiency can still be achieved. The output impedances are then translated into frequency thus allowing the realization of broadband power amplifiers (PAs) at high-power level of 30 W. In this work, the Class-ABJ broadband approach will be used for the realization of a reconfigurable dual-band power amplifier operating in the two frequency bands 2.1–2.2 and 2.5–2.6 GHz. Continuous wave (CW) measurements on the realized PA show power and efficiency greater than 17 W and 55% in the two frequency bands with peak values up to 30 W and 63.7%. Indeed, it is shown that such novel modes can be predistorted and therefore the linearity requirement can also be met.