The safe operating area (SOA) of InGaP/GaAs heterojunction bipolar transistors has been studied using two-dimensional Technology Computer-Aided Design (TCAD) tool. Comprehensive physical models, including hydrodynamic transport-based impact ionization and self-heating models were implemented. The simulations for two DC modes (constant Ib and Vb modes) captured all the SOA features observed in measurements and some failure mechanisms were revealed for the first time by TCAD simulations. The simulated results are also in agreement with analytical modeling. The simulation not only gives us insight to the detailed failure mechanisms, but also provides guidance for the design of devices with better ruggedness and improved SOA performances.

In evaluating the potential of a given integrated-circuit technology, the negative conductance approach is used to estimate a maximum frequency limit for the ability of Heterojunction Bipolar Transistor (HBT) cross-coupled architecture to function as an oscillator at high frequencies. In this paper, the simple low-frequency estimation of the negative conductance, commonly used in the literature, is extended by deriving a new expression that takes into account the HBT parasitics. An expression for the frequency at which the negative conductance of the circuit crosses zero is given, which gives maximum frequency of oscillation for an ideal tank (no tank losses). In addition, the effect of the feedback capacitor, which is commonly added for direct current (DC) decoupling and boosting the negative conductance, is analyzed and new insight on the choice of the value of this capacitance is introduced. The results were proven by simulations using SiGe HBT transistors with an ft of 190 GHz.

The design of a 61.44 GHz integrated Phase-locked loop (PLL) on a 180 GHz BiCMOS technology is presented. The PLL was optimized for a very fast settling time of 4 µs as required by the system specifications. Because the receiver is using a carrier recovery circuit that can follow the slow changes of the carrier such as phase noise, the sensitivity of the bit error rate to phase noise at the receiver end is very low. As a result, to achieve the required dynamic behavior, the phase noise performance could be sacrificed and the loop bandwidth was increased until the needed settling time was achieved, while taking the suppression of the reference spurs into consideration. Capacitor multiplication was used to enable the integration of the loop filter (LF) on chip and the effect of the capacitor multiplier on the total PLL phase noise performance was quantified and evaluated. In addition, a very close matching between the measured and simulated phase noise of the system was achieved. The PLL consumes a power of 200 mW from 2 and 3 V supply voltages, while delivering a differential output power of −7 dBm, sufficient to drive the following I/Q modulator without additional amplification.

This paper deals with the various aspects of electromagnetic field impact modeling on the SiGe heterojunction bipolar transistor (HBT) device for microwave applications. This study differs from conventional HBT device reliability research associated with other stresses. The originality of this study comes from the generation of a localized electromagnetic field using the near-field bench. A coupling phenomenon between the electromagnetic field and the micro-strip lines connecting the transistor are evaluated by electromagnetic and electrical simulations. After stress, the input and the transmission scattering parameters are affected. This is primarily due to the deviation of the input impedance and the reduction of the transconductance, respectively. The stress effects have been related to a base current degradation. This degradation is due to a hot carrier introducing generation/recombination trap centers at the Si/SiO2 interface of the emitter–base spacer oxide, which leads to an excess recombination base current.

This paper presents an investigation of a concurrent low-cost dual-band power amplifier (PA) fabricated in SiGe technology, able to simultaneously operate at two frequencies of 2.45 and 3.5-GHz, including an evaluation of its system level performance potentiality. Taking into account the technology novelty and the lack of device characterization and modeling, a hybrid (MIC) approach has been adopted both for a fast prototyping of the PA and for the evaluation of the device potentiality based on an extensive linear and nonlinear characterization. The comparison of PA performance in single-band or concurrent mode operation will be presented. In particular, the measured PA prototype shows an output power of 17.2 and 17-dBm at a 1-dB compression point, at 2.45 and 3.5-GHz, respectively, for CW single-mode operation, with a power added efficiency around 20%. System-level analysis predicts that, when the PA is operated under the 20-MHz Orthogonal Frequency-Division Multiplexing (OFDM) concurrent signals, the maximum output power levels to maintain the Error Vector Magnitude (EVM) within 5% are 11 and 3.5-dBm at 2.45 and 3.5-GHz, respectively. Moreover, new concepts and possible new system architectures for the development of the next generation of the multi-band transceiver front-end will be provided with an extensive system-level evaluation of the amplifier.

We report on the fabrication and characterization of GaN/4H-SiC n-p-n heterojunction bipolar transistors (HBTs). The device structure consists of an n-SiC collector, p-SiC base, and selectively grown n-GaN emitter. The HBTs were grown using metalorganic chemical vapor deposition on SiC substrates. Selective GaN growth through a SiO2 mask was used to avoid damage that would be caused by reactive ion etching. In this report, we demonstrate common base transistor operation with a modest dc current gain of 15 at room temperature and 3 at 300°C.

A new heterobipolar transistor was made with the wide bandgap semicon-ductors gallium nitride (GaN) and silicon carbide (SiC). The heterojunction allows high injection efficiency, even at elevated temperatures. A record current gain of ten million was obtained at room temperature, decreasing to 100 at 535°C. An Arrhenius plot of current gain vs 1/T yields an activation energy of 0.43 eV that corresponds to the valence band barrier blocking the escape of holes from the base to the emitter. This activation energy is approximately equal to the difference of energy gaps between emitter and base. This Transistor can operate at high power without cooling. A power density of 30 KW/cm2 was sustained.