Book contents
- Frontmatter
- Contents
- Preface
- 1 Introduction
- 2 Design considerations
- 3 Hybrid voltage–current programming
- 4 Enhanced-settling current programming
- 5 Charge-based driving scheme
- 6 High-resolution architectures
- 7 Summary and outlook
- Appendix A Enhanced voltage driving schemes
- Appendix B OLED electrical calibration
- References
- Index
6 - High-resolution architectures
Published online by Cambridge University Press: 05 September 2013
- Frontmatter
- Contents
- Preface
- 1 Introduction
- 2 Design considerations
- 3 Hybrid voltage–current programming
- 4 Enhanced-settling current programming
- 5 Charge-based driving scheme
- 6 High-resolution architectures
- 7 Summary and outlook
- Appendix A Enhanced voltage driving schemes
- Appendix B OLED electrical calibration
- References
- Index
Summary
For some applications such as high-resolution AMOLED displays for TVs and monitors, as well as for highly sensitive imaging modalities such as radiography and radiotherapy, the backplane should compensate for all the effects caused by the aging or mismatches to achieve the intended accuracy (e.g. less than 0.5% differential aging for a TV screen). While the entire proposed driving scheme compensates only for the static effect of VT-shift (i.e. drop in the pixel current/gain), the transient effects such as charge injection and clock feed-through can cause up to 10% error in the pixel characteristics. To solve this issue, we introduce a calibration technique capable of controlling the transient effects as well as the static effect of the VT-shift (mismatches) [108, 112, 113]. Moreover, a hybrid approach is introduced that takes advantage of both calibration technique and in-pixel compensation.
Time-dependent charge injection and clock feed-through
To compensate for the VT-shift/mismatch, the compensation techniques [64, 67] lead to a modification in the gate voltage of the drive TFT to provide a constant overdrive voltage. However, as a consequence of this change in the gate voltage, clock feed-through and charge injection associated with the parasitic capacitances change over time. Since the storage capacitor cannot be large due to the mandated frame time and aperture ratio, the parasitic capacitances stemming from the overlap of the gate over the drain and source become comparable. Moreover, the threshold voltage of the switch TFTs decreases since they are under negative bias stress during most of the frame time [58]. Consequently, the charge profile of their channels changes for a given programming voltage inducing a time-dependent error.
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- Information
- Thin Film Transistor Circuits and Systems , pp. 114 - 137Publisher: Cambridge University PressPrint publication year: 2013