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Study of SrTiO3 Gate Dielectrics

Published online by Cambridge University Press:  26 February 2011

C.Y. Liu  and
Tseung-Yuen Tseng
C.Y. Liu
Affiliation:
[email protected], National Kaohsiung University of Applied Sciences, Department and Institute of Electronic Engineering, Kaohsiung 807, Taiwan
Tseung-Yuen Tseng
Affiliation:
[email protected], National Chiao Tung University, Department of Electronics Engineering, 1001 Ta Hsueh Road,, Hsinchu, 300, Taiwan, 886-3-5731879, 886-3-5724361
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Abstract

Among various possible candidates of high-k gate dielectrics, SrTiO3 plays an important role because it has high dielectric constant and it can be epitaxially grown on silicon substrate. The fabrication process and properties of SrTiO3 gate dielectrics are reported. The effect of the addition of SiO2 on the microstructure and electrical properties of SrTiO3 gate dielectric is also presented. The minimization of the effect of interfacial layer between SrTiO3 and Si is the most important issue for obtaining high quality high-k gate dielectrics. The possible methods to improve the interfacial properties and the measurement techniques to characterize the interfacial layer are discussed.

Keywords

dielectric propertiesthin filmelectrical properties
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 966: Symposium T – Ferroelectrics and Multiferroics , 2006 , 0966-T12-04
Copyright
Copyright © Materials Research Society 2007

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References

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