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Reliability of Oxide Thin Film Transistors under the Gate Bias Stress with 400 nm Wavelength Light Illumination

Published online by Cambridge University Press:  27 June 2011

Soo-Yeon Lee
Affiliation:
School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Republic of Korea
Sun-Jae Kim
Affiliation:
School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Republic of Korea
Yongwook Lee
Affiliation:
School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Republic of Korea Samsung Electronics, Yongin-Si, Republic of Korea
Woo-Geun Lee
Affiliation:
Samsung Electronics, Yongin-Si, Republic of Korea
Kap-Soo Yoon
Affiliation:
Samsung Electronics, Yongin-Si, Republic of Korea
Jang-Yeon Kwon
Affiliation:
Department of Materials Science and Engineering, Seoul National University, Seoul, Republic of Korea
Min-Koo Han
Affiliation:
School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Republic of Korea
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Abstract

We have investigated the reliability of the inverted-staggered etch stopper structure oxide-based TFTs under negative gate bias stress combined with 400 nm wavelength light illumination and the relationship between the carrier concentration at the channel and the extent of Vth shift. It was found that the photo-induced holes cause the severe Vth degradation at the beginning of stress and the hole trapping rate of a single hole is not altered with the increase of the hole concentration. In oxide-based TFTs, the hole concentration at the channel is the determinant factor of the reliability.

Type
Research Article
Copyright
Copyright © Materials Research Society 2011

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