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Ferroelectric Gate FET Memory based on Conduction of SBT-SiON Interface

Published online by Cambridge University Press:  26 February 2011

Masanori Okuyama ,
Takaaki Minami ,
Bong-Yeon Lee  and
Takeshi Kanashima
Masanori Okuyama
Affiliation:
[email protected], Graduate School of Engineering Science, Osaka University, Department of Systems Innovation, 1-3 Machikaneyama-cho, Toyonaka City,Osaka, 560-8531, Japan
Takaaki Minami
Affiliation:
[email protected], Graduate School of Engineering Science, Osaka University, Department of Systems Innovation, 1-3 Machikaneyama-cho, Toyonaka City,Osaka, 560-8531, Japan
Bong-Yeon Lee
Affiliation:
[email protected], Graduate School of Engineering Science, Osaka University, Department of Systems Innovation, 1-3 Machikaneyama-cho, Toyonaka City,Osaka, 560-8531, Japan
Takeshi Kanashima
Affiliation:
[email protected], Graduate School of Engineering Science, Osaka University, Department of Systems Innovation, 1-3 Machikaneyama-cho, Toyonaka City,Osaka, 560-8531, Japan
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Abstract

A new type of ferroelectric gate field-effect transistor (FET) using ferroelectric-insulator interface conduction has been proposed. Drain current flows along the interface between the ferroelectric and insulator layers and requires no semiconductor. This FET is fabricated by forming of source and drain electrodes on a SiON/Si substrate, dpositing SrBi2Ta2O9(SBT) film, forming topgate electrode, and forming bottom electrode. Drain current versus topgate voltage characteristics show a clockwise hysteresis loop similarly to the conventional metal-ferroelectric-insulator-semiconductor-FET(MFIS-FET). This FET shows that the On/Off ratio of the drain current is 104 to 105 and the Off state current of about 10−9 A.

Keywords

memoryferroelectricdevices
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 966: Symposium T – Ferroelectrics and Multiferroics , 2006 , 0966-T13-06
Copyright
Copyright © Materials Research Society 2007

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References

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