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Effect of TaN Stoichiometry on Barrier Oxidation and Defect Density in 32nm Cu/Ultra-Low K Interconnects

Published online by Cambridge University Press:  01 February 2011

Andrew H. Simon
Affiliation:
[email protected], Independent Bulk CMOS and SOI Technology Development Alliance Projects at IBM Microelectronics, Div. Semiconductor Research and Development Center, IBM Microelectronics, Hopewell Junction, New York, United States
Frieder H. Baumann
Affiliation:
[email protected], Independent Bulk CMOS and SOI Technology Development Alliance Projects at IBM Microelectronics, Div. Semiconductor Research and Development Center, IBM Microelectronics, Hopewell Junction, New York, United States
Tibor Bolom
Affiliation:
[email protected], Independent Bulk CMOS and SOI Technology Development Alliance Projects at IBM Microelectronics, Div. Semiconductor Research and Development Center, GLOBALFOUNDRIES Inc, Hopewell Junction, New York, United States
Jong Guk Park
Affiliation:
[email protected], Independent Bulk CMOS and SOI Technology Development Alliance Projects at IBM Microelectronics, Div. Semiconductor Research and Development Center, Samsung Electronics, Hopewell Junction, New York, United States
Craig Child
Affiliation:
[email protected], Independent Bulk CMOS and SOI Technology Development Alliance Projects at IBM Microelectronics, Div. Semiconductor Research and Development Center, GLOBALFOUNDRIES Inc, Hopewell Junction, New York, United States
Ben Kim
Affiliation:
[email protected], Independent Bulk CMOS and SOI Technology Development Alliance Projects at IBM Microelectronics, Div. Semiconductor Research and Development Center, STMicroelectronics, Hopewell Junction, New York, United States
Patrick W. DeHaven
Affiliation:
[email protected], Independent Bulk CMOS and SOI Technology Development Alliance Projects at IBM Microelectronics, Div. Semiconductor Research and Development Center, IBM Microelectronics, Hopewell Junction, New York, United States
Robert E. Davis
Affiliation:
[email protected], Independent Bulk CMOS and SOI Technology Development Alliance Projects at IBM Microelectronics, Div. Semiconductor Research and Development Center, IBM Microelectronics, Hopewell Junction, New York, United States
Oluwafemi O Ogunsola
Affiliation:
[email protected], United States
Matthew S Angyal
Affiliation:
[email protected], Independent Bulk CMOS and SOI Technology Development Alliance Projects at IBM Microelectronics, Div. Semiconductor Research and Development Center, IBM Microelectronics, Hopewell Junction, New York, United States
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Abstract

The scaling of BEOL interconnect technology in ULSI circuitry requires the integration of Cu wiring with ultra-low K (ULK) dielectrics. We present the results of a study of the interaction between different-stoichiometry Ta(N)/Cu barrier processes and porous ULK dielectrics (k=2.4) at 32nm groundrules Auger and diffraction analysis of blanket wafers was used to benchmark two different stoichiometries of TaN barrier deposited using commercially-available ionized PVD sources. Comparison TEM and EDX/EELS images indicates that barrier oxidation is occurring in the low nitrogen-content Ta(N) barrier, which is absent at the higher stoichiometry. These differences are further manifested in defect-density analysis of patterned wafers comparing the two processes. These results illustrate the critical importance the TaN barrier properties play in enabling the integration of Cu/ULK interconnects at 32nm at beyond.

Type
Research Article
Copyright
Copyright © Materials Research Society 2010

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