Characterization of Strontium Oxide Layers on Silicon for CMOS High-K Gate Stack Scaling

J Bruley; M Frank; C Marchiori; J Fompeyrine; V Narayanan

doi:10.1017/S1431927611007628

Characterization of Strontium Oxide Layers on Silicon for CMOS High-K Gate Stack Scaling

Published online by Cambridge University Press: 08 April 2017

J Bruley ,

M Frank ,

C Marchiori ,

J Fompeyrine and

V Narayanan

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J Bruley: Affiliation:
IBM
M Frank: Affiliation:
IBM
C Marchiori: Affiliation:
IBM Research, Switzerland
J Fompeyrine: Affiliation:
IBM Research, Switzerland
V Narayanan: Affiliation:
IBM

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Extended abstract of a paper presented at Microscopy and Microanalysis 2011 in Nashville, Tennessee, USA, August 7–August 11, 2011.

Type: Abstract
Information: Microscopy and Microanalysis , Volume 17 , Supplement S2 , July 2011 , pp. 1350 - 1351

DOI: https://doi.org/10.1017/S1431927611007628 [Opens in a new window]

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Characterization of Strontium Oxide Layers on Silicon for CMOS High-K Gate Stack Scaling

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